xref: /netbsd-src/sys/rump/kern/lib/libsljit/arch/aarch64/cpufunc.c (revision 8cef4130c54ae89adec0a4442a1679914badd794)
1 /*	$NetBSD: cpufunc.c,v 1.1 2019/01/21 00:30:14 alnsn Exp $	*/
2 
3 /*-
4  * Copyright (c) 2019 Alexander Nasonov.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
17  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19  * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.1 2019/01/21 00:30:14 alnsn Exp $");
31 
32 /*
33  * Barebone implementation of arm cpufunc routines for rump.
34  */
35 
36 #include <machine/types.h>
37 #include <sys/types.h>
38 
39 #include "sljit_rump.h"
40 
41 void aarch64_icache_sync_range(vaddr_t, vsize_t);
42 
43 void
aarch64_icache_sync_range(vaddr_t va,vsize_t sz)44 aarch64_icache_sync_range(vaddr_t va, vsize_t sz)
45 {
46 
47 	// XXX MIPS and 32-bit ARM make this call:
48 	// (void)rumpcomp_sync_icache((void *)va, (uint64_t)sz);
49 	// but it doesn't link. Fix Makefiles to make it link.
50 	__builtin___clear_cache((void *)va, (char *)va + sz);
51 }
52