1 /* $NetBSD: sun50i-h616-ccu.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ 4 /* 5 * Copyright (C) 2020 Arm Ltd. 6 */ 7 8 #ifndef _DT_BINDINGS_RESET_SUN50I_H616_H_ 9 #define _DT_BINDINGS_RESET_SUN50I_H616_H_ 10 11 #define RST_MBUS 0 12 #define RST_BUS_DE 1 13 #define RST_BUS_DEINTERLACE 2 14 #define RST_BUS_GPU 3 15 #define RST_BUS_CE 4 16 #define RST_BUS_VE 5 17 #define RST_BUS_DMA 6 18 #define RST_BUS_HSTIMER 7 19 #define RST_BUS_DBG 8 20 #define RST_BUS_PSI 9 21 #define RST_BUS_PWM 10 22 #define RST_BUS_IOMMU 11 23 #define RST_BUS_DRAM 12 24 #define RST_BUS_NAND 13 25 #define RST_BUS_MMC0 14 26 #define RST_BUS_MMC1 15 27 #define RST_BUS_MMC2 16 28 #define RST_BUS_UART0 17 29 #define RST_BUS_UART1 18 30 #define RST_BUS_UART2 19 31 #define RST_BUS_UART3 20 32 #define RST_BUS_UART4 21 33 #define RST_BUS_UART5 22 34 #define RST_BUS_I2C0 23 35 #define RST_BUS_I2C1 24 36 #define RST_BUS_I2C2 25 37 #define RST_BUS_I2C3 26 38 #define RST_BUS_I2C4 27 39 #define RST_BUS_SPI0 28 40 #define RST_BUS_SPI1 29 41 #define RST_BUS_EMAC0 30 42 #define RST_BUS_EMAC1 31 43 #define RST_BUS_TS 32 44 #define RST_BUS_THS 33 45 #define RST_BUS_SPDIF 34 46 #define RST_BUS_DMIC 35 47 #define RST_BUS_AUDIO_CODEC 36 48 #define RST_BUS_AUDIO_HUB 37 49 #define RST_USB_PHY0 38 50 #define RST_USB_PHY1 39 51 #define RST_USB_PHY2 40 52 #define RST_USB_PHY3 41 53 #define RST_BUS_OHCI0 42 54 #define RST_BUS_OHCI1 43 55 #define RST_BUS_OHCI2 44 56 #define RST_BUS_OHCI3 45 57 #define RST_BUS_EHCI0 46 58 #define RST_BUS_EHCI1 47 59 #define RST_BUS_EHCI2 48 60 #define RST_BUS_EHCI3 49 61 #define RST_BUS_OTG 50 62 #define RST_BUS_HDMI 51 63 #define RST_BUS_HDMI_SUB 52 64 #define RST_BUS_TCON_TOP 53 65 #define RST_BUS_TCON_TV0 54 66 #define RST_BUS_TCON_TV1 55 67 #define RST_BUS_TVE_TOP 56 68 #define RST_BUS_TVE0 57 69 #define RST_BUS_HDCP 58 70 #define RST_BUS_KEYADC 59 71 72 #endif /* _DT_BINDINGS_RESET_SUN50I_H616_H_ */ 73