1 /* $NetBSD: k210-rst.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0+ */ 4 /* 5 * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com> 6 * Copyright (c) 2020 Western Digital Corporation or its affiliates. 7 */ 8 #ifndef RESET_K210_SYSCTL_H 9 #define RESET_K210_SYSCTL_H 10 11 /* 12 * Kendryte K210 SoC system controller K210_SYSCTL_SOFT_RESET register bits. 13 * Taken from Kendryte SDK (kendryte-standalone-sdk). 14 */ 15 #define K210_RST_ROM 0 16 #define K210_RST_DMA 1 17 #define K210_RST_AI 2 18 #define K210_RST_DVP 3 19 #define K210_RST_FFT 4 20 #define K210_RST_GPIO 5 21 #define K210_RST_SPI0 6 22 #define K210_RST_SPI1 7 23 #define K210_RST_SPI2 8 24 #define K210_RST_SPI3 9 25 #define K210_RST_I2S0 10 26 #define K210_RST_I2S1 11 27 #define K210_RST_I2S2 12 28 #define K210_RST_I2C0 13 29 #define K210_RST_I2C1 14 30 #define K210_RST_I2C2 15 31 #define K210_RST_UART1 16 32 #define K210_RST_UART2 17 33 #define K210_RST_UART3 18 34 #define K210_RST_AES 19 35 #define K210_RST_FPIOA 20 36 #define K210_RST_TIMER0 21 37 #define K210_RST_TIMER1 22 38 #define K210_RST_TIMER2 23 39 #define K210_RST_WDT0 24 40 #define K210_RST_WDT1 25 41 #define K210_RST_SHA 26 42 #define K210_RST_RTC 29 43 44 #endif /* RESET_K210_SYSCTL_H */ 45