1 /* $NetBSD: r8a7795-sysc.h,v 1.1.1.3 2020/01/03 14:33:03 skrll Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0-only */ 4 /* 5 * Copyright (C) 2016 Glider bvba 6 */ 7 #ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__ 8 #define __DT_BINDINGS_POWER_R8A7795_SYSC_H__ 9 10 /* 11 * These power domain indices match the numbers of the interrupt bits 12 * representing the power areas in the various Interrupt Registers 13 * (e.g. SYSCISR, Interrupt Status Register) 14 */ 15 16 #define R8A7795_PD_CA57_CPU0 0 17 #define R8A7795_PD_CA57_CPU1 1 18 #define R8A7795_PD_CA57_CPU2 2 19 #define R8A7795_PD_CA57_CPU3 3 20 #define R8A7795_PD_CA53_CPU0 5 21 #define R8A7795_PD_CA53_CPU1 6 22 #define R8A7795_PD_CA53_CPU2 7 23 #define R8A7795_PD_CA53_CPU3 8 24 #define R8A7795_PD_A3VP 9 25 #define R8A7795_PD_CA57_SCU 12 26 #define R8A7795_PD_CR7 13 27 #define R8A7795_PD_A3VC 14 28 #define R8A7795_PD_3DG_A 17 29 #define R8A7795_PD_3DG_B 18 30 #define R8A7795_PD_3DG_C 19 31 #define R8A7795_PD_3DG_D 20 32 #define R8A7795_PD_CA53_SCU 21 33 #define R8A7795_PD_3DG_E 22 34 #define R8A7795_PD_A3IR 24 35 #define R8A7795_PD_A2VC0 25 /* ES1.x only */ 36 #define R8A7795_PD_A2VC1 26 37 38 /* Always-on power area */ 39 #define R8A7795_PD_ALWAYS_ON 32 40 41 #endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */ 42