xref: /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/mfd/dbx500-prcmu.h (revision 6cafeaff4f65ec1a16fd3dea38137ce64d39d334)
1 /*	$NetBSD: dbx500-prcmu.h,v 1.1.1.2 2017/11/30 19:40:51 jmcneill Exp $	*/
2 
3 /* SPDX-License-Identifier: GPL-2.0 */
4 /*
5  * This header provides constants for the PRCMU bindings.
6  *
7  */
8 
9 #ifndef _DT_BINDINGS_MFD_PRCMU_H
10 #define _DT_BINDINGS_MFD_PRCMU_H
11 
12 /*
13  * Clock identifiers.
14  */
15 #define ARMCLK			0
16 #define PRCMU_ACLK		1
17 #define PRCMU_SVAMMCSPCLK 	2
18 #define PRCMU_SDMMCHCLK 	2  /* DBx540 only. */
19 #define PRCMU_SIACLK 		3
20 #define PRCMU_SIAMMDSPCLK 	3  /* DBx540 only. */
21 #define PRCMU_SGACLK 		4
22 #define PRCMU_UARTCLK 		5
23 #define PRCMU_MSP02CLK 		6
24 #define PRCMU_MSP1CLK 		7
25 #define PRCMU_I2CCLK 		8
26 #define PRCMU_SDMMCCLK 		9
27 #define PRCMU_SLIMCLK 		10
28 #define PRCMU_CAMCLK 		10 /* DBx540 only. */
29 #define PRCMU_PER1CLK 		11
30 #define PRCMU_PER2CLK 		12
31 #define PRCMU_PER3CLK 		13
32 #define PRCMU_PER5CLK 		14
33 #define PRCMU_PER6CLK 		15
34 #define PRCMU_PER7CLK 		16
35 #define PRCMU_LCDCLK 		17
36 #define PRCMU_BMLCLK 		18
37 #define PRCMU_HSITXCLK 		19
38 #define PRCMU_HSIRXCLK 		20
39 #define PRCMU_HDMICLK		21
40 #define PRCMU_APEATCLK 		22
41 #define PRCMU_APETRACECLK 	23
42 #define PRCMU_MCDECLK  	 	24
43 #define PRCMU_IPI2CCLK  	25
44 #define PRCMU_DSIALTCLK  	26
45 #define PRCMU_DMACLK  	 	27
46 #define PRCMU_B2R2CLK  	 	28
47 #define PRCMU_TVCLK  	 	29
48 #define SPARE_UNIPROCLK  	30
49 #define PRCMU_SSPCLK  	 	31
50 #define PRCMU_RNGCLK  	 	32
51 #define PRCMU_UICCCLK  	 	33
52 #define PRCMU_G1CLK             34 /* DBx540 only. */
53 #define PRCMU_HVACLK            35 /* DBx540 only. */
54 #define PRCMU_SPARE1CLK	 	36
55 #define PRCMU_SPARE2CLK	 	37
56 
57 #define PRCMU_NUM_REG_CLOCKS  	38
58 
59 #define PRCMU_RTCCLK  	 	PRCMU_NUM_REG_CLOCKS
60 #define PRCMU_SYSCLK  	 	39
61 #define PRCMU_CDCLK  	 	40
62 #define PRCMU_TIMCLK  	 	41
63 #define PRCMU_PLLSOC0  	 	42
64 #define PRCMU_PLLSOC1  	 	43
65 #define PRCMU_ARMSS  	 	44
66 #define PRCMU_PLLDDR  	 	45
67 
68 /* DSI Clocks */
69 #define PRCMU_PLLDSI  	 	46
70 #define PRCMU_DSI0CLK 	  	47
71 #define PRCMU_DSI1CLK  	 	48
72 #define PRCMU_DSI0ESCCLK  	49
73 #define PRCMU_DSI1ESCCLK  	50
74 #define PRCMU_DSI2ESCCLK  	51
75 
76 /* LCD DSI PLL - Ux540 only */
77 #define PRCMU_PLLDSI_LCD        52
78 #define PRCMU_DSI0CLK_LCD       53
79 #define PRCMU_DSI1CLK_LCD       54
80 #define PRCMU_DSI0ESCCLK_LCD    55
81 #define PRCMU_DSI1ESCCLK_LCD    56
82 #define PRCMU_DSI2ESCCLK_LCD    57
83 
84 #define PRCMU_NUM_CLKS  	58
85 
86 #endif
87