xref: /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/memory/tegra124-mc.h (revision 58c3e048f5c2f43ee7e820013e37079f2e0b6ae5)
1 /*	$NetBSD: tegra124-mc.h,v 1.1.1.4 2021/11/07 16:49:56 jmcneill Exp $	*/
2 
3 /* SPDX-License-Identifier: GPL-2.0 */
4 #ifndef DT_BINDINGS_MEMORY_TEGRA124_MC_H
5 #define DT_BINDINGS_MEMORY_TEGRA124_MC_H
6 
7 #define TEGRA_SWGROUP_PTC	0
8 #define TEGRA_SWGROUP_DC	1
9 #define TEGRA_SWGROUP_DCB	2
10 #define TEGRA_SWGROUP_AFI	3
11 #define TEGRA_SWGROUP_AVPC	4
12 #define TEGRA_SWGROUP_HDA	5
13 #define TEGRA_SWGROUP_HC	6
14 #define TEGRA_SWGROUP_MSENC	7
15 #define TEGRA_SWGROUP_PPCS	8
16 #define TEGRA_SWGROUP_SATA	9
17 #define TEGRA_SWGROUP_VDE	10
18 #define TEGRA_SWGROUP_MPCORELP	11
19 #define TEGRA_SWGROUP_MPCORE	12
20 #define TEGRA_SWGROUP_ISP2	13
21 #define TEGRA_SWGROUP_XUSB_HOST	14
22 #define TEGRA_SWGROUP_XUSB_DEV	15
23 #define TEGRA_SWGROUP_ISP2B	16
24 #define TEGRA_SWGROUP_TSEC	17
25 #define TEGRA_SWGROUP_A9AVP	18
26 #define TEGRA_SWGROUP_GPU	19
27 #define TEGRA_SWGROUP_SDMMC1A	20
28 #define TEGRA_SWGROUP_SDMMC2A	21
29 #define TEGRA_SWGROUP_SDMMC3A	22
30 #define TEGRA_SWGROUP_SDMMC4A	23
31 #define TEGRA_SWGROUP_VIC	24
32 #define TEGRA_SWGROUP_VI	25
33 
34 #define TEGRA124_MC_RESET_AFI		0
35 #define TEGRA124_MC_RESET_AVPC		1
36 #define TEGRA124_MC_RESET_DC		2
37 #define TEGRA124_MC_RESET_DCB		3
38 #define TEGRA124_MC_RESET_HC		4
39 #define TEGRA124_MC_RESET_HDA		5
40 #define TEGRA124_MC_RESET_ISP2		6
41 #define TEGRA124_MC_RESET_MPCORE	7
42 #define TEGRA124_MC_RESET_MPCORELP	8
43 #define TEGRA124_MC_RESET_MSENC		9
44 #define TEGRA124_MC_RESET_PPCS		10
45 #define TEGRA124_MC_RESET_SATA		11
46 #define TEGRA124_MC_RESET_VDE		12
47 #define TEGRA124_MC_RESET_VI		13
48 #define TEGRA124_MC_RESET_VIC		14
49 #define TEGRA124_MC_RESET_XUSB_HOST	15
50 #define TEGRA124_MC_RESET_XUSB_DEV	16
51 #define TEGRA124_MC_RESET_TSEC		17
52 #define TEGRA124_MC_RESET_SDMMC1	18
53 #define TEGRA124_MC_RESET_SDMMC2	19
54 #define TEGRA124_MC_RESET_SDMMC3	20
55 #define TEGRA124_MC_RESET_SDMMC4	21
56 #define TEGRA124_MC_RESET_ISP2B		22
57 #define TEGRA124_MC_RESET_GPU		23
58 
59 #define TEGRA124_MC_PTCR		0
60 #define TEGRA124_MC_DISPLAY0A		1
61 #define TEGRA124_MC_DISPLAY0AB		2
62 #define TEGRA124_MC_DISPLAY0B		3
63 #define TEGRA124_MC_DISPLAY0BB		4
64 #define TEGRA124_MC_DISPLAY0C		5
65 #define TEGRA124_MC_DISPLAY0CB		6
66 #define TEGRA124_MC_AFIR		14
67 #define TEGRA124_MC_AVPCARM7R		15
68 #define TEGRA124_MC_DISPLAYHC		16
69 #define TEGRA124_MC_DISPLAYHCB		17
70 #define TEGRA124_MC_HDAR		21
71 #define TEGRA124_MC_HOST1XDMAR		22
72 #define TEGRA124_MC_HOST1XR		23
73 #define TEGRA124_MC_MSENCSRD		28
74 #define TEGRA124_MC_PPCSAHBDMAR		29
75 #define TEGRA124_MC_PPCSAHBSLVR		30
76 #define TEGRA124_MC_SATAR		31
77 #define TEGRA124_MC_VDEBSEVR		34
78 #define TEGRA124_MC_VDEMBER		35
79 #define TEGRA124_MC_VDEMCER		36
80 #define TEGRA124_MC_VDETPER		37
81 #define TEGRA124_MC_MPCORELPR		38
82 #define TEGRA124_MC_MPCORER		39
83 #define TEGRA124_MC_MSENCSWR		43
84 #define TEGRA124_MC_AFIW		49
85 #define TEGRA124_MC_AVPCARM7W		50
86 #define TEGRA124_MC_HDAW		53
87 #define TEGRA124_MC_HOST1XW		54
88 #define TEGRA124_MC_MPCORELPW		56
89 #define TEGRA124_MC_MPCOREW		57
90 #define TEGRA124_MC_PPCSAHBDMAW		59
91 #define TEGRA124_MC_PPCSAHBSLVW		60
92 #define TEGRA124_MC_SATAW		61
93 #define TEGRA124_MC_VDEBSEVW		62
94 #define TEGRA124_MC_VDEDBGW		63
95 #define TEGRA124_MC_VDEMBEW		64
96 #define TEGRA124_MC_VDETPMW		65
97 #define TEGRA124_MC_ISPRA		68
98 #define TEGRA124_MC_ISPWA		70
99 #define TEGRA124_MC_ISPWB		71
100 #define TEGRA124_MC_XUSB_HOSTR		74
101 #define TEGRA124_MC_XUSB_HOSTW		75
102 #define TEGRA124_MC_XUSB_DEVR		76
103 #define TEGRA124_MC_XUSB_DEVW		77
104 #define TEGRA124_MC_ISPRAB		78
105 #define TEGRA124_MC_ISPWAB		80
106 #define TEGRA124_MC_ISPWBB		81
107 #define TEGRA124_MC_TSECSRD		84
108 #define TEGRA124_MC_TSECSWR		85
109 #define TEGRA124_MC_A9AVPSCR		86
110 #define TEGRA124_MC_A9AVPSCW		87
111 #define TEGRA124_MC_GPUSRD		88
112 #define TEGRA124_MC_GPUSWR		89
113 #define TEGRA124_MC_DISPLAYT		90
114 #define TEGRA124_MC_SDMMCRA		96
115 #define TEGRA124_MC_SDMMCRAA		97
116 #define TEGRA124_MC_SDMMCR		98
117 #define TEGRA124_MC_SDMMCRAB		99
118 #define TEGRA124_MC_SDMMCWA		100
119 #define TEGRA124_MC_SDMMCWAA		101
120 #define TEGRA124_MC_SDMMCW		102
121 #define TEGRA124_MC_SDMMCWAB		103
122 #define TEGRA124_MC_VICSRD		108
123 #define TEGRA124_MC_VICSWR		109
124 #define TEGRA124_MC_VIW			114
125 #define TEGRA124_MC_DISPLAYD		115
126 
127 #endif
128