xref: /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/interconnect/qcom,sm8250.h (revision 58c3e048f5c2f43ee7e820013e37079f2e0b6ae5)
1 /*	$NetBSD: qcom,sm8250.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $	*/
2 
3 /* SPDX-License-Identifier: GPL-2.0 */
4 /*
5  * Qualcomm SM8250 interconnect IDs
6  *
7  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
8  */
9 
10 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
11 #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8250_H
12 
13 #define MASTER_A1NOC_CFG		0
14 #define MASTER_QSPI_0			1
15 #define MASTER_QUP_1			2
16 #define MASTER_QUP_2			3
17 #define MASTER_TSIF			4
18 #define MASTER_PCIE_2			5
19 #define MASTER_SDCC_4			6
20 #define MASTER_UFS_MEM			7
21 #define MASTER_USB3			8
22 #define MASTER_USB3_1			9
23 #define A1NOC_SNOC_SLV			10
24 #define SLAVE_ANOC_PCIE_GEM_NOC_1	11
25 #define SLAVE_SERVICE_A1NOC		12
26 
27 #define MASTER_A2NOC_CFG		0
28 #define MASTER_QDSS_BAM			1
29 #define MASTER_QUP_0			2
30 #define MASTER_CNOC_A2NOC		3
31 #define MASTER_CRYPTO_CORE_0		4
32 #define MASTER_IPA			5
33 #define MASTER_PCIE			6
34 #define MASTER_PCIE_1			7
35 #define MASTER_QDSS_ETR			8
36 #define MASTER_SDCC_2			9
37 #define MASTER_UFS_CARD			10
38 #define A2NOC_SNOC_SLV			11
39 #define SLAVE_ANOC_PCIE_GEM_NOC		12
40 #define SLAVE_SERVICE_A2NOC		13
41 
42 #define MASTER_NPU			0
43 #define SLAVE_CDSP_MEM_NOC		1
44 
45 #define SNOC_CNOC_MAS			0
46 #define MASTER_QDSS_DAP			1
47 #define SLAVE_A1NOC_CFG			2
48 #define SLAVE_A2NOC_CFG			3
49 #define SLAVE_AHB2PHY_SOUTH		4
50 #define SLAVE_AHB2PHY_NORTH		5
51 #define SLAVE_AOSS			6
52 #define SLAVE_CAMERA_CFG		7
53 #define SLAVE_CLK_CTL			8
54 #define SLAVE_CDSP_CFG			9
55 #define SLAVE_RBCPR_CX_CFG		10
56 #define SLAVE_RBCPR_MMCX_CFG		11
57 #define SLAVE_RBCPR_MX_CFG		12
58 #define SLAVE_CRYPTO_0_CFG		13
59 #define SLAVE_CX_RDPM			14
60 #define SLAVE_DCC_CFG			15
61 #define SLAVE_CNOC_DDRSS		16
62 #define SLAVE_DISPLAY_CFG		17
63 #define SLAVE_GRAPHICS_3D_CFG		18
64 #define SLAVE_IMEM_CFG			19
65 #define SLAVE_IPA_CFG			20
66 #define SLAVE_IPC_ROUTER_CFG		21
67 #define SLAVE_LPASS			22
68 #define SLAVE_CNOC_MNOC_CFG		23
69 #define SLAVE_NPU_CFG			24
70 #define SLAVE_PCIE_0_CFG		25
71 #define SLAVE_PCIE_1_CFG		26
72 #define SLAVE_PCIE_2_CFG		27
73 #define SLAVE_PDM			28
74 #define SLAVE_PIMEM_CFG			29
75 #define SLAVE_PRNG			30
76 #define SLAVE_QDSS_CFG			31
77 #define SLAVE_QSPI_0			32
78 #define SLAVE_QUP_0			33
79 #define SLAVE_QUP_1			34
80 #define SLAVE_QUP_2			35
81 #define SLAVE_SDCC_2			36
82 #define SLAVE_SDCC_4			37
83 #define SLAVE_SNOC_CFG			38
84 #define SLAVE_TCSR			39
85 #define SLAVE_TLMM_NORTH		40
86 #define SLAVE_TLMM_SOUTH		41
87 #define SLAVE_TLMM_WEST			42
88 #define SLAVE_TSIF			43
89 #define SLAVE_UFS_CARD_CFG		44
90 #define SLAVE_UFS_MEM_CFG		45
91 #define SLAVE_USB3			46
92 #define SLAVE_USB3_1			47
93 #define SLAVE_VENUS_CFG			48
94 #define SLAVE_VSENSE_CTRL_CFG		49
95 #define SLAVE_CNOC_A2NOC		50
96 #define SLAVE_SERVICE_CNOC		51
97 
98 #define MASTER_CNOC_DC_NOC		0
99 #define SLAVE_LLCC_CFG			1
100 #define SLAVE_GEM_NOC_CFG		2
101 
102 #define MASTER_GPU_TCU			0
103 #define MASTER_SYS_TCU			1
104 #define MASTER_AMPSS_M0			2
105 #define MASTER_GEM_NOC_CFG		3
106 #define MASTER_COMPUTE_NOC		4
107 #define MASTER_GRAPHICS_3D		5
108 #define MASTER_MNOC_HF_MEM_NOC		6
109 #define MASTER_MNOC_SF_MEM_NOC		7
110 #define MASTER_ANOC_PCIE_GEM_NOC	8
111 #define MASTER_SNOC_GC_MEM_NOC		9
112 #define MASTER_SNOC_SF_MEM_NOC		10
113 #define SLAVE_GEM_NOC_SNOC		11
114 #define SLAVE_LLCC			12
115 #define SLAVE_MEM_NOC_PCIE_SNOC		13
116 #define SLAVE_SERVICE_GEM_NOC_1		14
117 #define SLAVE_SERVICE_GEM_NOC_2		15
118 #define SLAVE_SERVICE_GEM_NOC		16
119 
120 #define MASTER_IPA_CORE			0
121 #define SLAVE_IPA_CORE			1
122 
123 #define MASTER_LLCC			0
124 #define SLAVE_EBI_CH0			1
125 
126 #define MASTER_CNOC_MNOC_CFG		0
127 #define MASTER_CAMNOC_HF		1
128 #define MASTER_CAMNOC_ICP		2
129 #define MASTER_CAMNOC_SF		3
130 #define MASTER_VIDEO_P0			4
131 #define MASTER_VIDEO_P1			5
132 #define MASTER_VIDEO_PROC		6
133 #define MASTER_MDP_PORT0		7
134 #define MASTER_MDP_PORT1		8
135 #define MASTER_ROTATOR			9
136 #define SLAVE_MNOC_HF_MEM_NOC		10
137 #define SLAVE_MNOC_SF_MEM_NOC		11
138 #define SLAVE_SERVICE_MNOC		12
139 
140 #define MASTER_NPU_SYS			0
141 #define MASTER_NPU_CDP			1
142 #define MASTER_NPU_NOC_CFG		2
143 #define SLAVE_NPU_CAL_DP0		3
144 #define SLAVE_NPU_CAL_DP1		4
145 #define SLAVE_NPU_CP			5
146 #define SLAVE_NPU_INT_DMA_BWMON_CFG	6
147 #define SLAVE_NPU_DPM			7
148 #define SLAVE_ISENSE_CFG		8
149 #define SLAVE_NPU_LLM_CFG		9
150 #define SLAVE_NPU_TCM			10
151 #define SLAVE_NPU_COMPUTE_NOC		11
152 #define SLAVE_SERVICE_NPU_NOC		12
153 
154 #define MASTER_SNOC_CFG			0
155 #define A1NOC_SNOC_MAS			1
156 #define A2NOC_SNOC_MAS			2
157 #define MASTER_GEM_NOC_SNOC		3
158 #define MASTER_GEM_NOC_PCIE_SNOC	4
159 #define MASTER_PIMEM			5
160 #define MASTER_GIC			6
161 #define SLAVE_APPSS			7
162 #define SNOC_CNOC_SLV			8
163 #define SLAVE_SNOC_GEM_NOC_GC		9
164 #define SLAVE_SNOC_GEM_NOC_SF		10
165 #define SLAVE_OCIMEM			11
166 #define SLAVE_PIMEM			12
167 #define SLAVE_SERVICE_SNOC		13
168 #define SLAVE_PCIE_0			14
169 #define SLAVE_PCIE_1			15
170 #define SLAVE_PCIE_2			16
171 #define SLAVE_QDSS_STM			17
172 #define SLAVE_TCU			18
173 
174 #endif
175