1 /* $NetBSD: qcom,sc7180.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 */ 4 /* 5 * Qualcomm SC7180 interconnect IDs 6 * 7 * Copyright (c) 2020, The Linux Foundation. All rights reserved. 8 */ 9 10 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC7180_H 11 #define __DT_BINDINGS_INTERCONNECT_QCOM_SC7180_H 12 13 #define MASTER_A1NOC_CFG 0 14 #define MASTER_QSPI 1 15 #define MASTER_QUP_0 2 16 #define MASTER_SDCC_2 3 17 #define MASTER_EMMC 4 18 #define MASTER_UFS_MEM 5 19 #define SLAVE_A1NOC_SNOC 6 20 #define SLAVE_SERVICE_A1NOC 7 21 22 #define MASTER_A2NOC_CFG 0 23 #define MASTER_QDSS_BAM 1 24 #define MASTER_QUP_1 2 25 #define MASTER_USB3 3 26 #define MASTER_CRYPTO 4 27 #define MASTER_IPA 5 28 #define MASTER_QDSS_ETR 6 29 #define SLAVE_A2NOC_SNOC 7 30 #define SLAVE_SERVICE_A2NOC 8 31 32 #define MASTER_CAMNOC_HF0_UNCOMP 0 33 #define MASTER_CAMNOC_HF1_UNCOMP 1 34 #define MASTER_CAMNOC_SF_UNCOMP 2 35 #define SLAVE_CAMNOC_UNCOMP 3 36 37 #define MASTER_NPU 0 38 #define MASTER_NPU_PROC 1 39 #define SLAVE_CDSP_GEM_NOC 2 40 41 #define MASTER_SNOC_CNOC 0 42 #define MASTER_QDSS_DAP 1 43 #define SLAVE_A1NOC_CFG 2 44 #define SLAVE_A2NOC_CFG 3 45 #define SLAVE_AHB2PHY_SOUTH 4 46 #define SLAVE_AHB2PHY_CENTER 5 47 #define SLAVE_AOP 6 48 #define SLAVE_AOSS 7 49 #define SLAVE_BOOT_ROM 8 50 #define SLAVE_CAMERA_CFG 9 51 #define SLAVE_CAMERA_NRT_THROTTLE_CFG 10 52 #define SLAVE_CAMERA_RT_THROTTLE_CFG 11 53 #define SLAVE_CLK_CTL 12 54 #define SLAVE_RBCPR_CX_CFG 13 55 #define SLAVE_RBCPR_MX_CFG 14 56 #define SLAVE_CRYPTO_0_CFG 15 57 #define SLAVE_DCC_CFG 16 58 #define SLAVE_CNOC_DDRSS 17 59 #define SLAVE_DISPLAY_CFG 18 60 #define SLAVE_DISPLAY_RT_THROTTLE_CFG 19 61 #define SLAVE_DISPLAY_THROTTLE_CFG 20 62 #define SLAVE_EMMC_CFG 21 63 #define SLAVE_GLM 22 64 #define SLAVE_GFX3D_CFG 23 65 #define SLAVE_IMEM_CFG 24 66 #define SLAVE_IPA_CFG 25 67 #define SLAVE_CNOC_MNOC_CFG 26 68 #define SLAVE_CNOC_MSS 27 69 #define SLAVE_NPU_CFG 28 70 #define SLAVE_NPU_DMA_BWMON_CFG 29 71 #define SLAVE_NPU_PROC_BWMON_CFG 30 72 #define SLAVE_PDM 31 73 #define SLAVE_PIMEM_CFG 32 74 #define SLAVE_PRNG 33 75 #define SLAVE_QDSS_CFG 34 76 #define SLAVE_QM_CFG 35 77 #define SLAVE_QM_MPU_CFG 36 78 #define SLAVE_QSPI_0 37 79 #define SLAVE_QUP_0 38 80 #define SLAVE_QUP_1 39 81 #define SLAVE_SDCC_2 40 82 #define SLAVE_SECURITY 41 83 #define SLAVE_SNOC_CFG 42 84 #define SLAVE_TCSR 43 85 #define SLAVE_TLMM_WEST 44 86 #define SLAVE_TLMM_NORTH 45 87 #define SLAVE_TLMM_SOUTH 46 88 #define SLAVE_UFS_MEM_CFG 47 89 #define SLAVE_USB3 48 90 #define SLAVE_VENUS_CFG 49 91 #define SLAVE_VENUS_THROTTLE_CFG 50 92 #define SLAVE_VSENSE_CTRL_CFG 51 93 #define SLAVE_SERVICE_CNOC 52 94 95 #define MASTER_CNOC_DC_NOC 0 96 #define SLAVE_GEM_NOC_CFG 1 97 #define SLAVE_LLCC_CFG 2 98 99 #define MASTER_APPSS_PROC 0 100 #define MASTER_SYS_TCU 1 101 #define MASTER_GEM_NOC_CFG 2 102 #define MASTER_COMPUTE_NOC 3 103 #define MASTER_MNOC_HF_MEM_NOC 4 104 #define MASTER_MNOC_SF_MEM_NOC 5 105 #define MASTER_SNOC_GC_MEM_NOC 6 106 #define MASTER_SNOC_SF_MEM_NOC 7 107 #define MASTER_GFX3D 8 108 #define SLAVE_MSS_PROC_MS_MPU_CFG 9 109 #define SLAVE_GEM_NOC_SNOC 10 110 #define SLAVE_LLCC 11 111 #define SLAVE_SERVICE_GEM_NOC 12 112 113 #define MASTER_IPA_CORE 0 114 #define SLAVE_IPA_CORE 1 115 116 #define MASTER_LLCC 0 117 #define SLAVE_EBI1 1 118 119 #define MASTER_CNOC_MNOC_CFG 0 120 #define MASTER_CAMNOC_HF0 1 121 #define MASTER_CAMNOC_HF1 2 122 #define MASTER_CAMNOC_SF 3 123 #define MASTER_MDP0 4 124 #define MASTER_ROTATOR 5 125 #define MASTER_VIDEO_P0 6 126 #define MASTER_VIDEO_PROC 7 127 #define SLAVE_MNOC_HF_MEM_NOC 8 128 #define SLAVE_MNOC_SF_MEM_NOC 9 129 #define SLAVE_SERVICE_MNOC 10 130 131 #define MASTER_NPU_SYS 0 132 #define MASTER_NPU_NOC_CFG 1 133 #define SLAVE_NPU_CAL_DP0 2 134 #define SLAVE_NPU_CP 3 135 #define SLAVE_NPU_INT_DMA_BWMON_CFG 4 136 #define SLAVE_NPU_DPM 5 137 #define SLAVE_ISENSE_CFG 6 138 #define SLAVE_NPU_LLM_CFG 7 139 #define SLAVE_NPU_TCM 8 140 #define SLAVE_NPU_COMPUTE_NOC 9 141 #define SLAVE_SERVICE_NPU_NOC 10 142 143 #define MASTER_QUP_CORE_0 0 144 #define MASTER_QUP_CORE_1 1 145 #define SLAVE_QUP_CORE_0 2 146 #define SLAVE_QUP_CORE_1 3 147 148 #define MASTER_SNOC_CFG 0 149 #define MASTER_A1NOC_SNOC 1 150 #define MASTER_A2NOC_SNOC 2 151 #define MASTER_GEM_NOC_SNOC 3 152 #define MASTER_PIMEM 4 153 #define SLAVE_APPSS 5 154 #define SLAVE_SNOC_CNOC 6 155 #define SLAVE_SNOC_GEM_NOC_GC 7 156 #define SLAVE_SNOC_GEM_NOC_SF 8 157 #define SLAVE_IMEM 9 158 #define SLAVE_PIMEM 10 159 #define SLAVE_SERVICE_SNOC 11 160 #define SLAVE_QDSS_STM 12 161 #define SLAVE_TCU 13 162 163 #endif 164