1 /* $NetBSD: qcom,msm8916.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 */ 4 /* 5 * Qualcomm interconnect IDs 6 * 7 * Copyright (c) 2019, Linaro Ltd. 8 * Author: Georgi Djakov <georgi.djakov@linaro.org> 9 */ 10 11 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H 12 #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H 13 14 #define BIMC_SNOC_SLV 0 15 #define MASTER_JPEG 1 16 #define MASTER_MDP_PORT0 2 17 #define MASTER_QDSS_BAM 3 18 #define MASTER_QDSS_ETR 4 19 #define MASTER_SNOC_CFG 5 20 #define MASTER_VFE 6 21 #define MASTER_VIDEO_P0 7 22 #define SNOC_MM_INT_0 8 23 #define SNOC_MM_INT_1 9 24 #define SNOC_MM_INT_2 10 25 #define SNOC_MM_INT_BIMC 11 26 #define PCNOC_SNOC_SLV 12 27 #define SLAVE_APSS 13 28 #define SLAVE_CATS_128 14 29 #define SLAVE_OCMEM_64 15 30 #define SLAVE_IMEM 16 31 #define SLAVE_QDSS_STM 17 32 #define SLAVE_SRVC_SNOC 18 33 #define SNOC_BIMC_0_MAS 19 34 #define SNOC_BIMC_1_MAS 20 35 #define SNOC_INT_0 21 36 #define SNOC_INT_1 22 37 #define SNOC_INT_BIMC 23 38 #define SNOC_PCNOC_MAS 24 39 #define SNOC_QDSS_INT 25 40 41 #define BIMC_SNOC_MAS 0 42 #define MASTER_AMPSS_M0 1 43 #define MASTER_GRAPHICS_3D 2 44 #define MASTER_TCU0 3 45 #define MASTER_TCU1 4 46 #define SLAVE_AMPSS_L2 5 47 #define SLAVE_EBI_CH0 6 48 #define SNOC_BIMC_0_SLV 7 49 #define SNOC_BIMC_1_SLV 8 50 51 #define MASTER_BLSP_1 0 52 #define MASTER_DEHR 1 53 #define MASTER_LPASS 2 54 #define MASTER_CRYPTO_CORE0 3 55 #define MASTER_SDCC_1 4 56 #define MASTER_SDCC_2 5 57 #define MASTER_SPDM 6 58 #define MASTER_USB_HS 7 59 #define PCNOC_INT_0 8 60 #define PCNOC_INT_1 9 61 #define PCNOC_MAS_0 10 62 #define PCNOC_MAS_1 11 63 #define PCNOC_SLV_0 12 64 #define PCNOC_SLV_1 13 65 #define PCNOC_SLV_2 14 66 #define PCNOC_SLV_3 15 67 #define PCNOC_SLV_4 16 68 #define PCNOC_SLV_8 17 69 #define PCNOC_SLV_9 18 70 #define PCNOC_SNOC_MAS 19 71 #define SLAVE_BIMC_CFG 20 72 #define SLAVE_BLSP_1 21 73 #define SLAVE_BOOT_ROM 22 74 #define SLAVE_CAMERA_CFG 23 75 #define SLAVE_CLK_CTL 24 76 #define SLAVE_CRYPTO_0_CFG 25 77 #define SLAVE_DEHR_CFG 26 78 #define SLAVE_DISPLAY_CFG 27 79 #define SLAVE_GRAPHICS_3D_CFG 28 80 #define SLAVE_IMEM_CFG 29 81 #define SLAVE_LPASS 30 82 #define SLAVE_MPM 31 83 #define SLAVE_MSG_RAM 32 84 #define SLAVE_MSS 33 85 #define SLAVE_PDM 34 86 #define SLAVE_PMIC_ARB 35 87 #define SLAVE_PCNOC_CFG 36 88 #define SLAVE_PRNG 37 89 #define SLAVE_QDSS_CFG 38 90 #define SLAVE_RBCPR_CFG 39 91 #define SLAVE_SDCC_1 40 92 #define SLAVE_SDCC_2 41 93 #define SLAVE_SECURITY 42 94 #define SLAVE_SNOC_CFG 43 95 #define SLAVE_SPDM 44 96 #define SLAVE_TCSR 45 97 #define SLAVE_TLMM 46 98 #define SLAVE_USB_HS 47 99 #define SLAVE_VENUS_CFG 48 100 #define SNOC_PCNOC_SLV 49 101 102 #endif 103