1 /* $NetBSD: sun8i-h3-ccu.h,v 1.1.1.4 2020/01/03 14:33:04 skrll Exp $ */ 2 3 /* 4 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of the 14 * License, or (at your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * Or, alternatively, 22 * 23 * b) Permission is hereby granted, free of charge, to any person 24 * obtaining a copy of this software and associated documentation 25 * files (the "Software"), to deal in the Software without 26 * restriction, including without limitation the rights to use, 27 * copy, modify, merge, publish, distribute, sublicense, and/or 28 * sell copies of the Software, and to permit persons to whom the 29 * Software is furnished to do so, subject to the following 30 * conditions: 31 * 32 * The above copyright notice and this permission notice shall be 33 * included in all copies or substantial portions of the Software. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42 * OTHER DEALINGS IN THE SOFTWARE. 43 */ 44 45 #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_ 46 #define _DT_BINDINGS_CLK_SUN8I_H3_H_ 47 48 #define CLK_PLL_VIDEO 6 49 50 #define CLK_PLL_PERIPH0 9 51 52 #define CLK_CPUX 14 53 54 #define CLK_BUS_CE 20 55 #define CLK_BUS_DMA 21 56 #define CLK_BUS_MMC0 22 57 #define CLK_BUS_MMC1 23 58 #define CLK_BUS_MMC2 24 59 #define CLK_BUS_NAND 25 60 #define CLK_BUS_DRAM 26 61 #define CLK_BUS_EMAC 27 62 #define CLK_BUS_TS 28 63 #define CLK_BUS_HSTIMER 29 64 #define CLK_BUS_SPI0 30 65 #define CLK_BUS_SPI1 31 66 #define CLK_BUS_OTG 32 67 #define CLK_BUS_EHCI0 33 68 #define CLK_BUS_EHCI1 34 69 #define CLK_BUS_EHCI2 35 70 #define CLK_BUS_EHCI3 36 71 #define CLK_BUS_OHCI0 37 72 #define CLK_BUS_OHCI1 38 73 #define CLK_BUS_OHCI2 39 74 #define CLK_BUS_OHCI3 40 75 #define CLK_BUS_VE 41 76 #define CLK_BUS_TCON0 42 77 #define CLK_BUS_TCON1 43 78 #define CLK_BUS_DEINTERLACE 44 79 #define CLK_BUS_CSI 45 80 #define CLK_BUS_TVE 46 81 #define CLK_BUS_HDMI 47 82 #define CLK_BUS_DE 48 83 #define CLK_BUS_GPU 49 84 #define CLK_BUS_MSGBOX 50 85 #define CLK_BUS_SPINLOCK 51 86 #define CLK_BUS_CODEC 52 87 #define CLK_BUS_SPDIF 53 88 #define CLK_BUS_PIO 54 89 #define CLK_BUS_THS 55 90 #define CLK_BUS_I2S0 56 91 #define CLK_BUS_I2S1 57 92 #define CLK_BUS_I2S2 58 93 #define CLK_BUS_I2C0 59 94 #define CLK_BUS_I2C1 60 95 #define CLK_BUS_I2C2 61 96 #define CLK_BUS_UART0 62 97 #define CLK_BUS_UART1 63 98 #define CLK_BUS_UART2 64 99 #define CLK_BUS_UART3 65 100 #define CLK_BUS_SCR0 66 101 #define CLK_BUS_EPHY 67 102 #define CLK_BUS_DBG 68 103 104 #define CLK_THS 69 105 #define CLK_NAND 70 106 #define CLK_MMC0 71 107 #define CLK_MMC0_SAMPLE 72 108 #define CLK_MMC0_OUTPUT 73 109 #define CLK_MMC1 74 110 #define CLK_MMC1_SAMPLE 75 111 #define CLK_MMC1_OUTPUT 76 112 #define CLK_MMC2 77 113 #define CLK_MMC2_SAMPLE 78 114 #define CLK_MMC2_OUTPUT 79 115 #define CLK_TS 80 116 #define CLK_CE 81 117 #define CLK_SPI0 82 118 #define CLK_SPI1 83 119 #define CLK_I2S0 84 120 #define CLK_I2S1 85 121 #define CLK_I2S2 86 122 #define CLK_SPDIF 87 123 #define CLK_USB_PHY0 88 124 #define CLK_USB_PHY1 89 125 #define CLK_USB_PHY2 90 126 #define CLK_USB_PHY3 91 127 #define CLK_USB_OHCI0 92 128 #define CLK_USB_OHCI1 93 129 #define CLK_USB_OHCI2 94 130 #define CLK_USB_OHCI3 95 131 132 #define CLK_DRAM_VE 97 133 #define CLK_DRAM_CSI 98 134 #define CLK_DRAM_DEINTERLACE 99 135 #define CLK_DRAM_TS 100 136 #define CLK_DE 101 137 #define CLK_TCON0 102 138 #define CLK_TVE 103 139 #define CLK_DEINTERLACE 104 140 #define CLK_CSI_MISC 105 141 #define CLK_CSI_SCLK 106 142 #define CLK_CSI_MCLK 107 143 #define CLK_VE 108 144 #define CLK_AC_DIG 109 145 #define CLK_AVS 110 146 #define CLK_HDMI 111 147 #define CLK_HDMI_DDC 112 148 #define CLK_MBUS 113 149 #define CLK_GPU 114 150 151 /* New clocks imported in H5 */ 152 #define CLK_BUS_SCR1 115 153 154 #endif /* _DT_BINDINGS_CLK_SUN8I_H3_H_ */ 155