xref: /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/sun5i-ccu.h (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: sun5i-ccu.h,v 1.1.1.2 2017/10/28 10:30:32 jmcneill Exp $	*/
2 
3 /*
4  * Copyright 2016 Maxime Ripard
5  *
6  * Maxime Ripard <maxime.ripard@free-electrons.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  */
18 
19 #ifndef _DT_BINDINGS_CLK_SUN5I_H_
20 #define _DT_BINDINGS_CLK_SUN5I_H_
21 
22 #define CLK_HOSC		1
23 
24 #define CLK_PLL_VIDEO0_2X	9
25 
26 #define CLK_PLL_VIDEO1_2X	16
27 #define CLK_CPU			17
28 
29 #define CLK_AHB_OTG		23
30 #define CLK_AHB_EHCI		24
31 #define CLK_AHB_OHCI		25
32 #define CLK_AHB_SS		26
33 #define CLK_AHB_DMA		27
34 #define CLK_AHB_BIST		28
35 #define CLK_AHB_MMC0		29
36 #define CLK_AHB_MMC1		30
37 #define CLK_AHB_MMC2		31
38 #define CLK_AHB_NAND		32
39 #define CLK_AHB_SDRAM		33
40 #define CLK_AHB_EMAC		34
41 #define CLK_AHB_TS		35
42 #define CLK_AHB_SPI0		36
43 #define CLK_AHB_SPI1		37
44 #define CLK_AHB_SPI2		38
45 #define CLK_AHB_GPS		39
46 #define CLK_AHB_HSTIMER		40
47 #define CLK_AHB_VE		41
48 #define CLK_AHB_TVE		42
49 #define CLK_AHB_LCD		43
50 #define CLK_AHB_CSI		44
51 #define CLK_AHB_HDMI		45
52 #define CLK_AHB_DE_BE		46
53 #define CLK_AHB_DE_FE		47
54 #define CLK_AHB_IEP		48
55 #define CLK_AHB_GPU		49
56 #define CLK_APB0_CODEC		50
57 #define CLK_APB0_SPDIF		51
58 #define CLK_APB0_I2S		52
59 #define CLK_APB0_PIO		53
60 #define CLK_APB0_IR		54
61 #define CLK_APB0_KEYPAD		55
62 #define CLK_APB1_I2C0		56
63 #define CLK_APB1_I2C1		57
64 #define CLK_APB1_I2C2		58
65 #define CLK_APB1_UART0		59
66 #define CLK_APB1_UART1		60
67 #define CLK_APB1_UART2		61
68 #define CLK_APB1_UART3		62
69 #define CLK_NAND		63
70 #define CLK_MMC0		64
71 #define CLK_MMC1		65
72 #define CLK_MMC2		66
73 #define CLK_TS			67
74 #define CLK_SS			68
75 #define CLK_SPI0		69
76 #define CLK_SPI1		70
77 #define CLK_SPI2		71
78 #define CLK_IR			72
79 #define CLK_I2S			73
80 #define CLK_SPDIF		74
81 #define CLK_KEYPAD		75
82 #define CLK_USB_OHCI		76
83 #define CLK_USB_PHY0		77
84 #define CLK_USB_PHY1		78
85 #define CLK_GPS			79
86 #define CLK_DRAM_VE		80
87 #define CLK_DRAM_CSI		81
88 #define CLK_DRAM_TS		82
89 #define CLK_DRAM_TVE		83
90 #define CLK_DRAM_DE_FE		84
91 #define CLK_DRAM_DE_BE		85
92 #define CLK_DRAM_ACE		86
93 #define CLK_DRAM_IEP		87
94 #define CLK_DE_BE		88
95 #define CLK_DE_FE		89
96 #define CLK_TCON_CH0		90
97 
98 #define CLK_TCON_CH1		92
99 #define CLK_CSI			93
100 #define CLK_VE			94
101 #define CLK_CODEC		95
102 #define CLK_AVS			96
103 #define CLK_HDMI		97
104 #define CLK_GPU			98
105 
106 #define CLK_IEP			100
107 
108 #endif /* _DT_BINDINGS_CLK_SUN5I_H_ */
109