1 /* $NetBSD: r8a77995-cpg-mssr.h,v 1.1.1.3 2019/05/25 11:29:13 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0+ 4 * 5 * Copyright (C) 2017 Glider bvba 6 */ 7 #ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ 8 #define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ 9 10 #include <dt-bindings/clock/renesas-cpg-mssr.h> 11 12 /* r8a77995 CPG Core Clocks */ 13 #define R8A77995_CLK_Z2 0 14 #define R8A77995_CLK_ZG 1 15 #define R8A77995_CLK_ZTR 2 16 #define R8A77995_CLK_ZT 3 17 #define R8A77995_CLK_ZX 4 18 #define R8A77995_CLK_S0D1 5 19 #define R8A77995_CLK_S1D1 6 20 #define R8A77995_CLK_S1D2 7 21 #define R8A77995_CLK_S1D4 8 22 #define R8A77995_CLK_S2D1 9 23 #define R8A77995_CLK_S2D2 10 24 #define R8A77995_CLK_S2D4 11 25 #define R8A77995_CLK_S3D1 12 26 #define R8A77995_CLK_S3D2 13 27 #define R8A77995_CLK_S3D4 14 28 #define R8A77995_CLK_S1D4C 15 29 #define R8A77995_CLK_S3D1C 16 30 #define R8A77995_CLK_S3D2C 17 31 #define R8A77995_CLK_S3D4C 18 32 #define R8A77995_CLK_LB 19 33 #define R8A77995_CLK_CL 20 34 #define R8A77995_CLK_ZB3 21 35 #define R8A77995_CLK_ZB3D2 22 36 #define R8A77995_CLK_CR 23 37 #define R8A77995_CLK_CRD2 24 38 #define R8A77995_CLK_SD0H 25 39 #define R8A77995_CLK_SD0 26 40 /* CLK_SSP2 was removed */ 41 /* CLK_SSP1 was removed */ 42 #define R8A77995_CLK_RPC 29 43 #define R8A77995_CLK_RPCD2 30 44 #define R8A77995_CLK_ZA2 31 45 #define R8A77995_CLK_ZA8 32 46 #define R8A77995_CLK_Z2D 33 47 #define R8A77995_CLK_CANFD 34 48 #define R8A77995_CLK_MSO 35 49 #define R8A77995_CLK_R 36 50 #define R8A77995_CLK_OSC 37 51 #define R8A77995_CLK_LV0 38 52 #define R8A77995_CLK_LV1 39 53 #define R8A77995_CLK_CP 40 54 #define R8A77995_CLK_CPEX 41 55 56 #endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */ 57