1 /* $NetBSD: r8a77961-cpg-mssr.h,v 1.1.1.1 2020/01/03 14:33:05 skrll Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0+ 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 #ifndef __DT_BINDINGS_CLOCK_R8A77961_CPG_MSSR_H__ 8 #define __DT_BINDINGS_CLOCK_R8A77961_CPG_MSSR_H__ 9 10 #include <dt-bindings/clock/renesas-cpg-mssr.h> 11 12 /* r8a77961 CPG Core Clocks */ 13 #define R8A77961_CLK_Z 0 14 #define R8A77961_CLK_Z2 1 15 #define R8A77961_CLK_ZR 2 16 #define R8A77961_CLK_ZG 3 17 #define R8A77961_CLK_ZTR 4 18 #define R8A77961_CLK_ZTRD2 5 19 #define R8A77961_CLK_ZT 6 20 #define R8A77961_CLK_ZX 7 21 #define R8A77961_CLK_S0D1 8 22 #define R8A77961_CLK_S0D2 9 23 #define R8A77961_CLK_S0D3 10 24 #define R8A77961_CLK_S0D4 11 25 #define R8A77961_CLK_S0D6 12 26 #define R8A77961_CLK_S0D8 13 27 #define R8A77961_CLK_S0D12 14 28 #define R8A77961_CLK_S1D1 15 29 #define R8A77961_CLK_S1D2 16 30 #define R8A77961_CLK_S1D4 17 31 #define R8A77961_CLK_S2D1 18 32 #define R8A77961_CLK_S2D2 19 33 #define R8A77961_CLK_S2D4 20 34 #define R8A77961_CLK_S3D1 21 35 #define R8A77961_CLK_S3D2 22 36 #define R8A77961_CLK_S3D4 23 37 #define R8A77961_CLK_LB 24 38 #define R8A77961_CLK_CL 25 39 #define R8A77961_CLK_ZB3 26 40 #define R8A77961_CLK_ZB3D2 27 41 #define R8A77961_CLK_ZB3D4 28 42 #define R8A77961_CLK_CR 29 43 #define R8A77961_CLK_CRD2 30 44 #define R8A77961_CLK_SD0H 31 45 #define R8A77961_CLK_SD0 32 46 #define R8A77961_CLK_SD1H 33 47 #define R8A77961_CLK_SD1 34 48 #define R8A77961_CLK_SD2H 35 49 #define R8A77961_CLK_SD2 36 50 #define R8A77961_CLK_SD3H 37 51 #define R8A77961_CLK_SD3 38 52 #define R8A77961_CLK_SSP2 39 53 #define R8A77961_CLK_SSP1 40 54 #define R8A77961_CLK_SSPRS 41 55 #define R8A77961_CLK_RPC 42 56 #define R8A77961_CLK_RPCD2 43 57 #define R8A77961_CLK_MSO 44 58 #define R8A77961_CLK_CANFD 45 59 #define R8A77961_CLK_HDMI 46 60 #define R8A77961_CLK_CSI0 47 61 /* CLK_CSIREF was removed */ 62 #define R8A77961_CLK_CP 49 63 #define R8A77961_CLK_CPEX 50 64 #define R8A77961_CLK_R 51 65 #define R8A77961_CLK_OSC 52 66 67 #endif /* __DT_BINDINGS_CLOCK_R8A77961_CPG_MSSR_H__ */ 68