xref: /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/qcom,mmcc-msm8974.h (revision 796c32c94f6e154afc9de0f63da35c91bb739b45)
1 /*	$NetBSD: qcom,mmcc-msm8974.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $	*/
2 
3 /*
4  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
5  *
6  * This software is licensed under the terms of the GNU General Public
7  * License version 2, as published by the Free Software Foundation, and
8  * may be copied, distributed, and modified under those terms.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #ifndef _DT_BINDINGS_CLK_MSM_MMCC_8974_H
17 #define _DT_BINDINGS_CLK_MSM_MMCC_8974_H
18 
19 #define MMSS_AHB_CLK_SRC				0
20 #define MMSS_AXI_CLK_SRC				1
21 #define MMPLL0						2
22 #define MMPLL0_VOTE					3
23 #define MMPLL1						4
24 #define MMPLL1_VOTE					5
25 #define MMPLL2						6
26 #define MMPLL3						7
27 #define CSI0_CLK_SRC					8
28 #define CSI1_CLK_SRC					9
29 #define CSI2_CLK_SRC					10
30 #define CSI3_CLK_SRC					11
31 #define VFE0_CLK_SRC					12
32 #define VFE1_CLK_SRC					13
33 #define MDP_CLK_SRC					14
34 #define GFX3D_CLK_SRC					15
35 #define JPEG0_CLK_SRC					16
36 #define JPEG1_CLK_SRC					17
37 #define JPEG2_CLK_SRC					18
38 #define PCLK0_CLK_SRC					19
39 #define PCLK1_CLK_SRC					20
40 #define VCODEC0_CLK_SRC					21
41 #define CCI_CLK_SRC					22
42 #define CAMSS_GP0_CLK_SRC				23
43 #define CAMSS_GP1_CLK_SRC				24
44 #define MCLK0_CLK_SRC					25
45 #define MCLK1_CLK_SRC					26
46 #define MCLK2_CLK_SRC					27
47 #define MCLK3_CLK_SRC					28
48 #define CSI0PHYTIMER_CLK_SRC				29
49 #define CSI1PHYTIMER_CLK_SRC				30
50 #define CSI2PHYTIMER_CLK_SRC				31
51 #define CPP_CLK_SRC					32
52 #define BYTE0_CLK_SRC					33
53 #define BYTE1_CLK_SRC					34
54 #define EDPAUX_CLK_SRC					35
55 #define EDPLINK_CLK_SRC					36
56 #define EDPPIXEL_CLK_SRC				37
57 #define ESC0_CLK_SRC					38
58 #define ESC1_CLK_SRC					39
59 #define EXTPCLK_CLK_SRC					40
60 #define HDMI_CLK_SRC					41
61 #define VSYNC_CLK_SRC					42
62 #define MMSS_RBCPR_CLK_SRC				43
63 #define CAMSS_CCI_CCI_AHB_CLK				44
64 #define CAMSS_CCI_CCI_CLK				45
65 #define CAMSS_CSI0_AHB_CLK				46
66 #define CAMSS_CSI0_CLK					47
67 #define CAMSS_CSI0PHY_CLK				48
68 #define CAMSS_CSI0PIX_CLK				49
69 #define CAMSS_CSI0RDI_CLK				50
70 #define CAMSS_CSI1_AHB_CLK				51
71 #define CAMSS_CSI1_CLK					52
72 #define CAMSS_CSI1PHY_CLK				53
73 #define CAMSS_CSI1PIX_CLK				54
74 #define CAMSS_CSI1RDI_CLK				55
75 #define CAMSS_CSI2_AHB_CLK				56
76 #define CAMSS_CSI2_CLK					57
77 #define CAMSS_CSI2PHY_CLK				58
78 #define CAMSS_CSI2PIX_CLK				59
79 #define CAMSS_CSI2RDI_CLK				60
80 #define CAMSS_CSI3_AHB_CLK				61
81 #define CAMSS_CSI3_CLK					62
82 #define CAMSS_CSI3PHY_CLK				63
83 #define CAMSS_CSI3PIX_CLK				64
84 #define CAMSS_CSI3RDI_CLK				65
85 #define CAMSS_CSI_VFE0_CLK				66
86 #define CAMSS_CSI_VFE1_CLK				67
87 #define CAMSS_GP0_CLK					68
88 #define CAMSS_GP1_CLK					69
89 #define CAMSS_ISPIF_AHB_CLK				70
90 #define CAMSS_JPEG_JPEG0_CLK				71
91 #define CAMSS_JPEG_JPEG1_CLK				72
92 #define CAMSS_JPEG_JPEG2_CLK				73
93 #define CAMSS_JPEG_JPEG_AHB_CLK				74
94 #define CAMSS_JPEG_JPEG_AXI_CLK				75
95 #define CAMSS_JPEG_JPEG_OCMEMNOC_CLK			76
96 #define CAMSS_MCLK0_CLK					77
97 #define CAMSS_MCLK1_CLK					78
98 #define CAMSS_MCLK2_CLK					79
99 #define CAMSS_MCLK3_CLK					80
100 #define CAMSS_MICRO_AHB_CLK				81
101 #define CAMSS_PHY0_CSI0PHYTIMER_CLK			82
102 #define CAMSS_PHY1_CSI1PHYTIMER_CLK			83
103 #define CAMSS_PHY2_CSI2PHYTIMER_CLK			84
104 #define CAMSS_TOP_AHB_CLK				85
105 #define CAMSS_VFE_CPP_AHB_CLK				86
106 #define CAMSS_VFE_CPP_CLK				87
107 #define CAMSS_VFE_VFE0_CLK				88
108 #define CAMSS_VFE_VFE1_CLK				89
109 #define CAMSS_VFE_VFE_AHB_CLK				90
110 #define CAMSS_VFE_VFE_AXI_CLK				91
111 #define CAMSS_VFE_VFE_OCMEMNOC_CLK			92
112 #define MDSS_AHB_CLK					93
113 #define MDSS_AXI_CLK					94
114 #define MDSS_BYTE0_CLK					95
115 #define MDSS_BYTE1_CLK					96
116 #define MDSS_EDPAUX_CLK					97
117 #define MDSS_EDPLINK_CLK				98
118 #define MDSS_EDPPIXEL_CLK				99
119 #define MDSS_ESC0_CLK					100
120 #define MDSS_ESC1_CLK					101
121 #define MDSS_EXTPCLK_CLK				102
122 #define MDSS_HDMI_AHB_CLK				103
123 #define MDSS_HDMI_CLK					104
124 #define MDSS_MDP_CLK					105
125 #define MDSS_MDP_LUT_CLK				106
126 #define MDSS_PCLK0_CLK					107
127 #define MDSS_PCLK1_CLK					108
128 #define MDSS_VSYNC_CLK					109
129 #define MMSS_MISC_AHB_CLK				110
130 #define MMSS_MMSSNOC_AHB_CLK				111
131 #define MMSS_MMSSNOC_BTO_AHB_CLK			112
132 #define MMSS_MMSSNOC_AXI_CLK				113
133 #define MMSS_S0_AXI_CLK					114
134 #define OCMEMCX_AHB_CLK					115
135 #define OCMEMCX_OCMEMNOC_CLK				116
136 #define OXILI_OCMEMGX_CLK				117
137 #define OCMEMNOC_CLK					118
138 #define OXILI_GFX3D_CLK					119
139 #define OXILICX_AHB_CLK					120
140 #define OXILICX_AXI_CLK					121
141 #define VENUS0_AHB_CLK					122
142 #define VENUS0_AXI_CLK					123
143 #define VENUS0_OCMEMNOC_CLK				124
144 #define VENUS0_VCODEC0_CLK				125
145 #define OCMEMNOC_CLK_SRC				126
146 #define SPDM_JPEG0					127
147 #define SPDM_JPEG1					128
148 #define SPDM_MDP					129
149 #define SPDM_AXI					130
150 #define SPDM_VCODEC0					131
151 #define SPDM_VFE0					132
152 #define SPDM_VFE1					133
153 #define SPDM_JPEG2					134
154 #define SPDM_PCLK1					135
155 #define SPDM_GFX3D					136
156 #define SPDM_AHB					137
157 #define SPDM_PCLK0					138
158 #define SPDM_OCMEMNOC					139
159 #define SPDM_CSI0					140
160 #define SPDM_RM_AXI					141
161 #define SPDM_RM_OCMEMNOC				142
162 
163 /* gdscs */
164 #define VENUS0_GDSC					0
165 #define MDSS_GDSC					1
166 #define CAMSS_JPEG_GDSC					2
167 #define CAMSS_VFE_GDSC					3
168 #define OXILI_GDSC					4
169 #define OXILICX_GDSC					5
170 
171 #endif
172