1 /* $NetBSD: qcom,camcc-sm8250.h,v 1.1.1.1 2021/11/07 16:49:57 jmcneill Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 */ 4 /* 5 * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. 6 */ 7 8 #ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SM8250_H 9 #define _DT_BINDINGS_CLK_QCOM_CAM_CC_SM8250_H 10 11 /* CAM_CC clocks */ 12 #define CAM_CC_BPS_AHB_CLK 0 13 #define CAM_CC_BPS_AREG_CLK 1 14 #define CAM_CC_BPS_AXI_CLK 2 15 #define CAM_CC_BPS_CLK 3 16 #define CAM_CC_BPS_CLK_SRC 4 17 #define CAM_CC_CAMNOC_AXI_CLK 5 18 #define CAM_CC_CAMNOC_AXI_CLK_SRC 6 19 #define CAM_CC_CAMNOC_DCD_XO_CLK 7 20 #define CAM_CC_CCI_0_CLK 8 21 #define CAM_CC_CCI_0_CLK_SRC 9 22 #define CAM_CC_CCI_1_CLK 10 23 #define CAM_CC_CCI_1_CLK_SRC 11 24 #define CAM_CC_CORE_AHB_CLK 12 25 #define CAM_CC_CPAS_AHB_CLK 13 26 #define CAM_CC_CPHY_RX_CLK_SRC 14 27 #define CAM_CC_CSI0PHYTIMER_CLK 15 28 #define CAM_CC_CSI0PHYTIMER_CLK_SRC 16 29 #define CAM_CC_CSI1PHYTIMER_CLK 17 30 #define CAM_CC_CSI1PHYTIMER_CLK_SRC 18 31 #define CAM_CC_CSI2PHYTIMER_CLK 19 32 #define CAM_CC_CSI2PHYTIMER_CLK_SRC 20 33 #define CAM_CC_CSI3PHYTIMER_CLK 21 34 #define CAM_CC_CSI3PHYTIMER_CLK_SRC 22 35 #define CAM_CC_CSI4PHYTIMER_CLK 23 36 #define CAM_CC_CSI4PHYTIMER_CLK_SRC 24 37 #define CAM_CC_CSI5PHYTIMER_CLK 25 38 #define CAM_CC_CSI5PHYTIMER_CLK_SRC 26 39 #define CAM_CC_CSIPHY0_CLK 27 40 #define CAM_CC_CSIPHY1_CLK 28 41 #define CAM_CC_CSIPHY2_CLK 29 42 #define CAM_CC_CSIPHY3_CLK 30 43 #define CAM_CC_CSIPHY4_CLK 31 44 #define CAM_CC_CSIPHY5_CLK 32 45 #define CAM_CC_FAST_AHB_CLK_SRC 33 46 #define CAM_CC_FD_CORE_CLK 34 47 #define CAM_CC_FD_CORE_CLK_SRC 35 48 #define CAM_CC_FD_CORE_UAR_CLK 36 49 #define CAM_CC_GDSC_CLK 37 50 #define CAM_CC_ICP_AHB_CLK 38 51 #define CAM_CC_ICP_CLK 39 52 #define CAM_CC_ICP_CLK_SRC 40 53 #define CAM_CC_IFE_0_AHB_CLK 41 54 #define CAM_CC_IFE_0_AREG_CLK 42 55 #define CAM_CC_IFE_0_AXI_CLK 43 56 #define CAM_CC_IFE_0_CLK 44 57 #define CAM_CC_IFE_0_CLK_SRC 45 58 #define CAM_CC_IFE_0_CPHY_RX_CLK 46 59 #define CAM_CC_IFE_0_CSID_CLK 47 60 #define CAM_CC_IFE_0_CSID_CLK_SRC 48 61 #define CAM_CC_IFE_0_DSP_CLK 49 62 #define CAM_CC_IFE_1_AHB_CLK 50 63 #define CAM_CC_IFE_1_AREG_CLK 51 64 #define CAM_CC_IFE_1_AXI_CLK 52 65 #define CAM_CC_IFE_1_CLK 53 66 #define CAM_CC_IFE_1_CLK_SRC 54 67 #define CAM_CC_IFE_1_CPHY_RX_CLK 55 68 #define CAM_CC_IFE_1_CSID_CLK 56 69 #define CAM_CC_IFE_1_CSID_CLK_SRC 57 70 #define CAM_CC_IFE_1_DSP_CLK 58 71 #define CAM_CC_IFE_LITE_AHB_CLK 59 72 #define CAM_CC_IFE_LITE_AXI_CLK 60 73 #define CAM_CC_IFE_LITE_CLK 61 74 #define CAM_CC_IFE_LITE_CLK_SRC 62 75 #define CAM_CC_IFE_LITE_CPHY_RX_CLK 63 76 #define CAM_CC_IFE_LITE_CSID_CLK 64 77 #define CAM_CC_IFE_LITE_CSID_CLK_SRC 65 78 #define CAM_CC_IPE_0_AHB_CLK 66 79 #define CAM_CC_IPE_0_AREG_CLK 67 80 #define CAM_CC_IPE_0_AXI_CLK 68 81 #define CAM_CC_IPE_0_CLK 69 82 #define CAM_CC_IPE_0_CLK_SRC 70 83 #define CAM_CC_JPEG_CLK 71 84 #define CAM_CC_JPEG_CLK_SRC 72 85 #define CAM_CC_MCLK0_CLK 73 86 #define CAM_CC_MCLK0_CLK_SRC 74 87 #define CAM_CC_MCLK1_CLK 75 88 #define CAM_CC_MCLK1_CLK_SRC 76 89 #define CAM_CC_MCLK2_CLK 77 90 #define CAM_CC_MCLK2_CLK_SRC 78 91 #define CAM_CC_MCLK3_CLK 79 92 #define CAM_CC_MCLK3_CLK_SRC 80 93 #define CAM_CC_MCLK4_CLK 81 94 #define CAM_CC_MCLK4_CLK_SRC 82 95 #define CAM_CC_MCLK5_CLK 83 96 #define CAM_CC_MCLK5_CLK_SRC 84 97 #define CAM_CC_MCLK6_CLK 85 98 #define CAM_CC_MCLK6_CLK_SRC 86 99 #define CAM_CC_PLL0 87 100 #define CAM_CC_PLL0_OUT_EVEN 88 101 #define CAM_CC_PLL0_OUT_ODD 89 102 #define CAM_CC_PLL1 90 103 #define CAM_CC_PLL1_OUT_EVEN 91 104 #define CAM_CC_PLL2 92 105 #define CAM_CC_PLL2_OUT_MAIN 93 106 #define CAM_CC_PLL3 94 107 #define CAM_CC_PLL3_OUT_EVEN 95 108 #define CAM_CC_PLL4 96 109 #define CAM_CC_PLL4_OUT_EVEN 97 110 #define CAM_CC_SBI_AHB_CLK 98 111 #define CAM_CC_SBI_AXI_CLK 99 112 #define CAM_CC_SBI_CLK 100 113 #define CAM_CC_SBI_CPHY_RX_CLK 101 114 #define CAM_CC_SBI_CSID_CLK 102 115 #define CAM_CC_SBI_CSID_CLK_SRC 103 116 #define CAM_CC_SBI_DIV_CLK_SRC 104 117 #define CAM_CC_SBI_IFE_0_CLK 105 118 #define CAM_CC_SBI_IFE_1_CLK 106 119 #define CAM_CC_SLEEP_CLK 107 120 #define CAM_CC_SLEEP_CLK_SRC 108 121 #define CAM_CC_SLOW_AHB_CLK_SRC 109 122 #define CAM_CC_XO_CLK_SRC 110 123 124 /* CAM_CC resets */ 125 #define CAM_CC_BPS_BCR 0 126 #define CAM_CC_ICP_BCR 1 127 #define CAM_CC_IFE_0_BCR 2 128 #define CAM_CC_IFE_1_BCR 3 129 #define CAM_CC_IPE_0_BCR 4 130 #define CAM_CC_SBI_BCR 5 131 132 /* CAM_CC GDSCRs */ 133 #define BPS_GDSC 0 134 #define IPE_0_GDSC 1 135 #define SBI_GDSC 2 136 #define IFE_0_GDSC 3 137 #define IFE_1_GDSC 4 138 #define TITAN_TOP_GDSC 5 139 140 #endif 141