1 /* $NetBSD: jz4725b-cgu.h,v 1.1.1.2 2020/01/03 14:33:04 skrll Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0 */ 4 /* 5 * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding. 6 */ 7 8 #ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ 9 #define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ 10 11 #define JZ4725B_CLK_EXT 0 12 #define JZ4725B_CLK_OSC32K 1 13 #define JZ4725B_CLK_PLL 2 14 #define JZ4725B_CLK_PLL_HALF 3 15 #define JZ4725B_CLK_CCLK 4 16 #define JZ4725B_CLK_HCLK 5 17 #define JZ4725B_CLK_PCLK 6 18 #define JZ4725B_CLK_MCLK 7 19 #define JZ4725B_CLK_IPU 8 20 #define JZ4725B_CLK_LCD 9 21 #define JZ4725B_CLK_I2S 10 22 #define JZ4725B_CLK_SPI 11 23 #define JZ4725B_CLK_MMC_MUX 12 24 #define JZ4725B_CLK_UDC 13 25 #define JZ4725B_CLK_UART 14 26 #define JZ4725B_CLK_DMA 15 27 #define JZ4725B_CLK_ADC 16 28 #define JZ4725B_CLK_I2C 17 29 #define JZ4725B_CLK_AIC 18 30 #define JZ4725B_CLK_MMC0 19 31 #define JZ4725B_CLK_MMC1 20 32 #define JZ4725B_CLK_BCH 21 33 #define JZ4725B_CLK_TCU 22 34 #define JZ4725B_CLK_EXT512 23 35 #define JZ4725B_CLK_RTC 24 36 #define JZ4725B_CLK_UDC_PHY 25 37 38 #endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */ 39