1 /* $NetBSD: bcm-ns2.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $ */ 2 3 /* 4 * BSD LICENSE 5 * 6 * Copyright(c) 2015 Broadcom Corporation. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 12 * * Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * * Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in 16 * the documentation and/or other materials provided with the 17 * distribution. 18 * * Neither the name of Broadcom Corporation nor the names of its 19 * contributors may be used to endorse or promote products derived 20 * from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #ifndef _CLOCK_BCM_NS2_H 36 #define _CLOCK_BCM_NS2_H 37 38 /* GENPLL SCR clock channel ID */ 39 #define BCM_NS2_GENPLL_SCR 0 40 #define BCM_NS2_GENPLL_SCR_SCR_CLK 1 41 #define BCM_NS2_GENPLL_SCR_FS_CLK 2 42 #define BCM_NS2_GENPLL_SCR_AUDIO_CLK 3 43 #define BCM_NS2_GENPLL_SCR_CH3_UNUSED 4 44 #define BCM_NS2_GENPLL_SCR_CH4_UNUSED 5 45 #define BCM_NS2_GENPLL_SCR_CH5_UNUSED 6 46 47 /* GENPLL SW clock channel ID */ 48 #define BCM_NS2_GENPLL_SW 0 49 #define BCM_NS2_GENPLL_SW_RPE_CLK 1 50 #define BCM_NS2_GENPLL_SW_250_CLK 2 51 #define BCM_NS2_GENPLL_SW_NIC_CLK 3 52 #define BCM_NS2_GENPLL_SW_CHIMP_CLK 4 53 #define BCM_NS2_GENPLL_SW_PORT_CLK 5 54 #define BCM_NS2_GENPLL_SW_SDIO_CLK 6 55 56 /* LCPLL DDR clock channel ID */ 57 #define BCM_NS2_LCPLL_DDR 0 58 #define BCM_NS2_LCPLL_DDR_PCIE_SATA_USB_CLK 1 59 #define BCM_NS2_LCPLL_DDR_DDR_CLK 2 60 #define BCM_NS2_LCPLL_DDR_CH2_UNUSED 3 61 #define BCM_NS2_LCPLL_DDR_CH3_UNUSED 4 62 #define BCM_NS2_LCPLL_DDR_CH4_UNUSED 5 63 #define BCM_NS2_LCPLL_DDR_CH5_UNUSED 6 64 65 /* LCPLL PORTS clock channel ID */ 66 #define BCM_NS2_LCPLL_PORTS 0 67 #define BCM_NS2_LCPLL_PORTS_WAN_CLK 1 68 #define BCM_NS2_LCPLL_PORTS_RGMII_CLK 2 69 #define BCM_NS2_LCPLL_PORTS_CH2_UNUSED 3 70 #define BCM_NS2_LCPLL_PORTS_CH3_UNUSED 4 71 #define BCM_NS2_LCPLL_PORTS_CH4_UNUSED 5 72 #define BCM_NS2_LCPLL_PORTS_CH5_UNUSED 6 73 74 #endif /* _CLOCK_BCM_NS2_H */ 75