xref: /netbsd-src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/alphascale,asm9260.h (revision 4effb9b18f024fdac2e35b6e9f6ec111f2d026be)
1 /*	$NetBSD: alphascale,asm9260.h,v 1.1.1.2 2020/01/03 14:33:04 skrll Exp $	*/
2 
3 /* SPDX-License-Identifier: GPL-2.0-only */
4 /*
5  * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
6  */
7 
8 #ifndef _DT_BINDINGS_CLK_ASM9260_H
9 #define _DT_BINDINGS_CLK_ASM9260_H
10 
11 /* ahb gate */
12 #define CLKID_AHB_ROM		0
13 #define CLKID_AHB_RAM		1
14 #define CLKID_AHB_GPIO		2
15 #define CLKID_AHB_MAC		3
16 #define CLKID_AHB_EMI		4
17 #define CLKID_AHB_USB0		5
18 #define CLKID_AHB_USB1		6
19 #define CLKID_AHB_DMA0		7
20 #define CLKID_AHB_DMA1		8
21 #define CLKID_AHB_UART0		9
22 #define CLKID_AHB_UART1		10
23 #define CLKID_AHB_UART2		11
24 #define CLKID_AHB_UART3		12
25 #define CLKID_AHB_UART4		13
26 #define CLKID_AHB_UART5		14
27 #define CLKID_AHB_UART6		15
28 #define CLKID_AHB_UART7		16
29 #define CLKID_AHB_UART8		17
30 #define CLKID_AHB_UART9		18
31 #define CLKID_AHB_I2S0		19
32 #define CLKID_AHB_I2C0		20
33 #define CLKID_AHB_I2C1		21
34 #define CLKID_AHB_SSP0		22
35 #define CLKID_AHB_IOCONFIG	23
36 #define CLKID_AHB_WDT		24
37 #define CLKID_AHB_CAN0		25
38 #define CLKID_AHB_CAN1		26
39 #define CLKID_AHB_MPWM		27
40 #define CLKID_AHB_SPI0		28
41 #define CLKID_AHB_SPI1		29
42 #define CLKID_AHB_QEI		30
43 #define CLKID_AHB_QUADSPI0	31
44 #define CLKID_AHB_CAMIF		32
45 #define CLKID_AHB_LCDIF		33
46 #define CLKID_AHB_TIMER0	34
47 #define CLKID_AHB_TIMER1	35
48 #define CLKID_AHB_TIMER2	36
49 #define CLKID_AHB_TIMER3	37
50 #define CLKID_AHB_IRQ		38
51 #define CLKID_AHB_RTC		39
52 #define CLKID_AHB_NAND		40
53 #define CLKID_AHB_ADC0		41
54 #define CLKID_AHB_LED		42
55 #define CLKID_AHB_DAC0		43
56 #define CLKID_AHB_LCD		44
57 #define CLKID_AHB_I2S1		45
58 #define CLKID_AHB_MAC1		46
59 
60 /* devider */
61 #define CLKID_SYS_CPU		47
62 #define CLKID_SYS_AHB		48
63 #define CLKID_SYS_I2S0M		49
64 #define CLKID_SYS_I2S0S		50
65 #define CLKID_SYS_I2S1M		51
66 #define CLKID_SYS_I2S1S		52
67 #define CLKID_SYS_UART0		53
68 #define CLKID_SYS_UART1		54
69 #define CLKID_SYS_UART2		55
70 #define CLKID_SYS_UART3		56
71 #define CLKID_SYS_UART4		56
72 #define CLKID_SYS_UART5		57
73 #define CLKID_SYS_UART6		58
74 #define CLKID_SYS_UART7		59
75 #define CLKID_SYS_UART8		60
76 #define CLKID_SYS_UART9		61
77 #define CLKID_SYS_SPI0		62
78 #define CLKID_SYS_SPI1		63
79 #define CLKID_SYS_QUADSPI	64
80 #define CLKID_SYS_SSP0		65
81 #define CLKID_SYS_NAND		66
82 #define CLKID_SYS_TRACE		67
83 #define CLKID_SYS_CAMM		68
84 #define CLKID_SYS_WDT		69
85 #define CLKID_SYS_CLKOUT	70
86 #define CLKID_SYS_MAC		71
87 #define CLKID_SYS_LCD		72
88 #define CLKID_SYS_ADCANA	73
89 
90 #define MAX_CLKS		74
91 #endif
92