1 /* $NetBSD: ch7006_mode.c,v 1.3 2021/12/18 23:45:27 riastradh Exp $ */
2
3 /*
4 * Copyright (C) 2009 Francisco Jerez.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining
8 * a copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sublicense, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial
17 * portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: ch7006_mode.c,v 1.3 2021/12/18 23:45:27 riastradh Exp $");
31
32 #include "ch7006_priv.h"
33
34 const char * const ch7006_tv_norm_names[] = {
35 [TV_NORM_PAL] = "PAL",
36 [TV_NORM_PAL_M] = "PAL-M",
37 [TV_NORM_PAL_N] = "PAL-N",
38 [TV_NORM_PAL_NC] = "PAL-Nc",
39 [TV_NORM_PAL_60] = "PAL-60",
40 [TV_NORM_NTSC_M] = "NTSC-M",
41 [TV_NORM_NTSC_J] = "NTSC-J",
42 };
43
44 #define NTSC_LIKE_TIMINGS .vrefresh = 60 * fixed1/1.001, \
45 .vdisplay = 480, \
46 .vtotal = 525, \
47 .hvirtual = 660
48
49 #define PAL_LIKE_TIMINGS .vrefresh = 50 * fixed1, \
50 .vdisplay = 576, \
51 .vtotal = 625, \
52 .hvirtual = 810
53
54 const struct ch7006_tv_norm_info ch7006_tv_norms[] = {
55 [TV_NORM_NTSC_M] = {
56 NTSC_LIKE_TIMINGS,
57 .black_level = 0.339 * fixed1,
58 .subc_freq = 3579545 * fixed1,
59 .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, NTSC),
60 .voffset = 0,
61 },
62 [TV_NORM_NTSC_J] = {
63 NTSC_LIKE_TIMINGS,
64 .black_level = 0.286 * fixed1,
65 .subc_freq = 3579545 * fixed1,
66 .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, NTSC_J),
67 .voffset = 0,
68 },
69 [TV_NORM_PAL] = {
70 PAL_LIKE_TIMINGS,
71 .black_level = 0.3 * fixed1,
72 .subc_freq = 4433618.75 * fixed1,
73 .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
74 .voffset = 0,
75 },
76 [TV_NORM_PAL_M] = {
77 NTSC_LIKE_TIMINGS,
78 .black_level = 0.339 * fixed1,
79 .subc_freq = 3575611.433 * fixed1,
80 .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL_M),
81 .voffset = 16,
82 },
83
84 /* The following modes seem to work right but they're
85 * undocumented */
86
87 [TV_NORM_PAL_N] = {
88 PAL_LIKE_TIMINGS,
89 .black_level = 0.339 * fixed1,
90 .subc_freq = 4433618.75 * fixed1,
91 .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
92 .voffset = 0,
93 },
94 [TV_NORM_PAL_NC] = {
95 PAL_LIKE_TIMINGS,
96 .black_level = 0.3 * fixed1,
97 .subc_freq = 3582056.25 * fixed1,
98 .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL),
99 .voffset = 0,
100 },
101 [TV_NORM_PAL_60] = {
102 NTSC_LIKE_TIMINGS,
103 .black_level = 0.3 * fixed1,
104 .subc_freq = 4433618.75 * fixed1,
105 .dispmode = bitfs(CH7006_DISPMODE_OUTPUT_STD, PAL_M),
106 .voffset = 16,
107 },
108 };
109
110 #define __MODE(f, hd, vd, ht, vt, hsynp, vsynp, \
111 subc, scale, scale_mask, norm_mask, e_hd, e_vd) { \
112 .mode = { \
113 .name = #hd "x" #vd, \
114 .status = 0, \
115 .type = DRM_MODE_TYPE_DRIVER, \
116 .clock = f, \
117 .hdisplay = hd, \
118 .hsync_start = e_hd + 16, \
119 .hsync_end = e_hd + 80, \
120 .htotal = ht, \
121 .hskew = 0, \
122 .vdisplay = vd, \
123 .vsync_start = vd + 10, \
124 .vsync_end = vd + 26, \
125 .vtotal = vt, \
126 .vscan = 0, \
127 .flags = DRM_MODE_FLAG_##hsynp##HSYNC | \
128 DRM_MODE_FLAG_##vsynp##VSYNC, \
129 .vrefresh = 0, \
130 }, \
131 .enc_hdisp = e_hd, \
132 .enc_vdisp = e_vd, \
133 .subc_coeff = subc * fixed1, \
134 .dispmode = bitfs(CH7006_DISPMODE_SCALING_RATIO, scale) | \
135 bitfs(CH7006_DISPMODE_INPUT_RES, e_hd##x##e_vd), \
136 .valid_scales = scale_mask, \
137 .valid_norms = norm_mask \
138 }
139
140 #define MODE(f, hd, vd, ht, vt, hsynp, vsynp, \
141 subc, scale, scale_mask, norm_mask) \
142 __MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale, \
143 scale_mask, norm_mask, hd, vd)
144
145 #define NTSC_LIKE (1 << TV_NORM_NTSC_M | 1 << TV_NORM_NTSC_J | \
146 1 << TV_NORM_PAL_M | 1 << TV_NORM_PAL_60)
147
148 #define PAL_LIKE (1 << TV_NORM_PAL | 1 << TV_NORM_PAL_N | 1 << TV_NORM_PAL_NC)
149
150 const struct ch7006_mode ch7006_modes[] = {
151 MODE(21000, 512, 384, 840, 500, N, N, 181.797557582, 5_4, 0x6, PAL_LIKE),
152 MODE(26250, 512, 384, 840, 625, N, N, 145.438046066, 1_1, 0x1, PAL_LIKE),
153 MODE(20140, 512, 384, 800, 420, N, N, 213.257083791, 5_4, 0x4, NTSC_LIKE),
154 MODE(24671, 512, 384, 784, 525, N, N, 174.0874153, 1_1, 0x3, NTSC_LIKE),
155 MODE(28125, 720, 400, 1125, 500, N, N, 135.742176298, 5_4, 0x6, PAL_LIKE),
156 MODE(34875, 720, 400, 1116, 625, N, N, 109.469496898, 1_1, 0x1, PAL_LIKE),
157 MODE(23790, 720, 400, 945, 420, N, N, 160.475642016, 5_4, 0x4, NTSC_LIKE),
158 MODE(29455, 720, 400, 936, 525, N, N, 129.614941843, 1_1, 0x3, NTSC_LIKE),
159 MODE(25000, 640, 400, 1000, 500, N, N, 152.709948279, 5_4, 0x6, PAL_LIKE),
160 MODE(31500, 640, 400, 1008, 625, N, N, 121.198371646, 1_1, 0x1, PAL_LIKE),
161 MODE(21147, 640, 400, 840, 420, N, N, 180.535097338, 5_4, 0x4, NTSC_LIKE),
162 MODE(26434, 640, 400, 840, 525, N, N, 144.42807787, 1_1, 0x2, NTSC_LIKE),
163 MODE(30210, 640, 400, 840, 600, N, N, 126.374568276, 7_8, 0x1, NTSC_LIKE),
164 MODE(21000, 640, 480, 840, 500, N, N, 181.797557582, 5_4, 0x4, PAL_LIKE),
165 MODE(26250, 640, 480, 840, 625, N, N, 145.438046066, 1_1, 0x2, PAL_LIKE),
166 MODE(31500, 640, 480, 840, 750, N, N, 121.198371646, 5_6, 0x1, PAL_LIKE),
167 MODE(24671, 640, 480, 784, 525, N, N, 174.0874153, 1_1, 0x4, NTSC_LIKE),
168 MODE(28196, 640, 480, 784, 600, N, N, 152.326488422, 7_8, 0x2, NTSC_LIKE),
169 MODE(30210, 640, 480, 800, 630, N, N, 142.171389101, 5_6, 0x1, NTSC_LIKE),
170 __MODE(29500, 720, 576, 944, 625, P, P, 145.592111636, 1_1, 0x7, PAL_LIKE, 800, 600),
171 MODE(36000, 800, 600, 960, 750, P, P, 119.304647022, 5_6, 0x6, PAL_LIKE),
172 MODE(39000, 800, 600, 936, 836, P, P, 110.127366499, 3_4, 0x1, PAL_LIKE),
173 MODE(39273, 800, 600, 1040, 630, P, P, 145.816809399, 5_6, 0x4, NTSC_LIKE),
174 MODE(43636, 800, 600, 1040, 700, P, P, 131.235128487, 3_4, 0x2, NTSC_LIKE),
175 MODE(47832, 800, 600, 1064, 750, P, P, 119.723275165, 7_10, 0x1, NTSC_LIKE),
176 {}
177 };
178
ch7006_lookup_mode(struct drm_encoder * encoder,const struct drm_display_mode * drm_mode)179 const struct ch7006_mode *ch7006_lookup_mode(struct drm_encoder *encoder,
180 const struct drm_display_mode *drm_mode)
181 {
182 struct ch7006_priv *priv = to_ch7006_priv(encoder);
183 const struct ch7006_mode *mode;
184
185 for (mode = ch7006_modes; mode->mode.clock; mode++) {
186
187 if (~mode->valid_norms & 1<<priv->norm)
188 continue;
189
190 if (mode->mode.hdisplay != drm_mode->hdisplay ||
191 mode->mode.vdisplay != drm_mode->vdisplay ||
192 mode->mode.vtotal != drm_mode->vtotal ||
193 mode->mode.htotal != drm_mode->htotal ||
194 mode->mode.clock != drm_mode->clock)
195 continue;
196
197 return mode;
198 }
199
200 return NULL;
201 }
202
203 /* Some common HW state calculation code */
204
ch7006_setup_levels(struct drm_encoder * encoder)205 void ch7006_setup_levels(struct drm_encoder *encoder)
206 {
207 struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
208 struct ch7006_priv *priv = to_ch7006_priv(encoder);
209 uint8_t *regs = priv->state.regs;
210 const struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
211 int gain;
212 int black_level;
213
214 /* Set DAC_GAIN if the voltage drop between white and black is
215 * high enough. */
216 if (norm->black_level < 339*fixed1/1000) {
217 gain = 76;
218
219 regs[CH7006_INPUT_FORMAT] |= CH7006_INPUT_FORMAT_DAC_GAIN;
220 } else {
221 gain = 71;
222
223 regs[CH7006_INPUT_FORMAT] &= ~CH7006_INPUT_FORMAT_DAC_GAIN;
224 }
225
226 black_level = round_fixed(norm->black_level*26625)/gain;
227
228 /* Correct it with the specified brightness. */
229 black_level = interpolate(90, black_level, 208, priv->brightness);
230
231 regs[CH7006_BLACK_LEVEL] = bitf(CH7006_BLACK_LEVEL_0, black_level);
232
233 ch7006_dbg(client, "black level: %d\n", black_level);
234 }
235
ch7006_setup_subcarrier(struct drm_encoder * encoder)236 void ch7006_setup_subcarrier(struct drm_encoder *encoder)
237 {
238 struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
239 struct ch7006_priv *priv = to_ch7006_priv(encoder);
240 struct ch7006_state *state = &priv->state;
241 const struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
242 const struct ch7006_mode *mode = priv->mode;
243 uint32_t subc_inc;
244
245 subc_inc = round_fixed((mode->subc_coeff >> 8)
246 * (norm->subc_freq >> 24));
247
248 setbitf(state, CH7006_SUBC_INC0, 28, subc_inc);
249 setbitf(state, CH7006_SUBC_INC1, 24, subc_inc);
250 setbitf(state, CH7006_SUBC_INC2, 20, subc_inc);
251 setbitf(state, CH7006_SUBC_INC3, 16, subc_inc);
252 setbitf(state, CH7006_SUBC_INC4, 12, subc_inc);
253 setbitf(state, CH7006_SUBC_INC5, 8, subc_inc);
254 setbitf(state, CH7006_SUBC_INC6, 4, subc_inc);
255 setbitf(state, CH7006_SUBC_INC7, 0, subc_inc);
256
257 ch7006_dbg(client, "subcarrier inc: %u\n", subc_inc);
258 }
259
ch7006_setup_pll(struct drm_encoder * encoder)260 void ch7006_setup_pll(struct drm_encoder *encoder)
261 {
262 struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
263 struct ch7006_priv *priv = to_ch7006_priv(encoder);
264 uint8_t *regs = priv->state.regs;
265 const struct ch7006_mode *mode = priv->mode;
266 int n, best_n = 0;
267 int m, best_m = 0;
268 int freq, best_freq = 0;
269
270 for (n = 0; n < CH7006_MAXN; n++) {
271 for (m = 0; m < CH7006_MAXM; m++) {
272 freq = CH7006_FREQ0*(n+2)/(m+2);
273
274 if (abs(freq - mode->mode.clock) <
275 abs(best_freq - mode->mode.clock)) {
276 best_freq = freq;
277 best_n = n;
278 best_m = m;
279 }
280 }
281 }
282
283 regs[CH7006_PLLOV] = bitf(CH7006_PLLOV_N_8, best_n) |
284 bitf(CH7006_PLLOV_M_8, best_m);
285
286 regs[CH7006_PLLM] = bitf(CH7006_PLLM_0, best_m);
287 regs[CH7006_PLLN] = bitf(CH7006_PLLN_0, best_n);
288
289 if (best_n < 108)
290 regs[CH7006_PLL_CONTROL] |= CH7006_PLL_CONTROL_CAPACITOR;
291 else
292 regs[CH7006_PLL_CONTROL] &= ~CH7006_PLL_CONTROL_CAPACITOR;
293
294 ch7006_dbg(client, "n=%d m=%d f=%d c=%d\n",
295 best_n, best_m, best_freq, best_n < 108);
296 }
297
ch7006_setup_power_state(struct drm_encoder * encoder)298 void ch7006_setup_power_state(struct drm_encoder *encoder)
299 {
300 struct ch7006_priv *priv = to_ch7006_priv(encoder);
301 uint8_t *power = &priv->state.regs[CH7006_POWER];
302 int subconnector;
303
304 subconnector = priv->select_subconnector ? priv->select_subconnector :
305 priv->subconnector;
306
307 *power = CH7006_POWER_RESET;
308
309 if (priv->last_dpms == DRM_MODE_DPMS_ON) {
310 switch (subconnector) {
311 case DRM_MODE_SUBCONNECTOR_SVIDEO:
312 *power |= bitfs(CH7006_POWER_LEVEL, CVBS_OFF);
313 break;
314 case DRM_MODE_SUBCONNECTOR_Composite:
315 *power |= bitfs(CH7006_POWER_LEVEL, SVIDEO_OFF);
316 break;
317 case DRM_MODE_SUBCONNECTOR_SCART:
318 *power |= bitfs(CH7006_POWER_LEVEL, NORMAL) |
319 CH7006_POWER_SCART;
320 break;
321 }
322
323 } else {
324 if (priv->chip_version >= 0x20)
325 *power |= bitfs(CH7006_POWER_LEVEL, FULL_POWER_OFF);
326 else
327 *power |= bitfs(CH7006_POWER_LEVEL, POWER_OFF);
328 }
329 }
330
ch7006_setup_properties(struct drm_encoder * encoder)331 void ch7006_setup_properties(struct drm_encoder *encoder)
332 {
333 struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
334 struct ch7006_priv *priv = to_ch7006_priv(encoder);
335 struct ch7006_state *state = &priv->state;
336 const struct ch7006_tv_norm_info *norm = &ch7006_tv_norms[priv->norm];
337 const struct ch7006_mode *ch_mode = priv->mode;
338 const struct drm_display_mode *mode = &ch_mode->mode;
339 uint8_t *regs = state->regs;
340 int flicker, contrast, hpos, vpos;
341 uint64_t scale, aspect;
342
343 flicker = interpolate(0, 2, 3, priv->flicker);
344 regs[CH7006_FFILTER] = bitf(CH7006_FFILTER_TEXT, flicker) |
345 bitf(CH7006_FFILTER_LUMA, flicker) |
346 bitf(CH7006_FFILTER_CHROMA, 1);
347
348 contrast = interpolate(0, 5, 7, priv->contrast);
349 regs[CH7006_CONTRAST] = bitf(CH7006_CONTRAST_0, contrast);
350
351 scale = norm->vtotal*fixed1;
352 do_div(scale, mode->vtotal);
353
354 aspect = ch_mode->enc_hdisp*fixed1;
355 do_div(aspect, ch_mode->enc_vdisp);
356
357 hpos = round_fixed((norm->hvirtual * aspect - mode->hdisplay * scale)
358 * priv->hmargin * mode->vtotal) / norm->vtotal / 100 / 4;
359
360 setbitf(state, CH7006_POV, HPOS_8, hpos);
361 setbitf(state, CH7006_HPOS, 0, hpos);
362
363 vpos = max(0, norm->vdisplay - round_fixed(mode->vdisplay*scale)
364 + norm->voffset) * priv->vmargin / 100 / 2;
365
366 setbitf(state, CH7006_POV, VPOS_8, vpos);
367 setbitf(state, CH7006_VPOS, 0, vpos);
368
369 ch7006_dbg(client, "hpos: %d, vpos: %d\n", hpos, vpos);
370 }
371
372 /* HW access functions */
373
ch7006_write(struct i2c_client * client,uint8_t addr,uint8_t val)374 void ch7006_write(struct i2c_client *client, uint8_t addr, uint8_t val)
375 {
376 uint8_t buf[] = {addr, val};
377 int ret;
378
379 ret = i2c_master_send(client, buf, ARRAY_SIZE(buf));
380 if (ret < 0)
381 ch7006_err(client, "Error %d writing to subaddress 0x%x\n",
382 ret, addr);
383 }
384
ch7006_read(struct i2c_client * client,uint8_t addr)385 uint8_t ch7006_read(struct i2c_client *client, uint8_t addr)
386 {
387 uint8_t val;
388 int ret;
389
390 ret = i2c_master_send(client, &addr, sizeof(addr));
391 if (ret < 0)
392 goto fail;
393
394 ret = i2c_master_recv(client, &val, sizeof(val));
395 if (ret < 0)
396 goto fail;
397
398 return val;
399
400 fail:
401 ch7006_err(client, "Error %d reading from subaddress 0x%x\n",
402 ret, addr);
403 return 0;
404 }
405
ch7006_state_load(struct i2c_client * client,struct ch7006_state * state)406 void ch7006_state_load(struct i2c_client *client,
407 struct ch7006_state *state)
408 {
409 ch7006_load_reg(client, state, CH7006_POWER);
410
411 ch7006_load_reg(client, state, CH7006_DISPMODE);
412 ch7006_load_reg(client, state, CH7006_FFILTER);
413 ch7006_load_reg(client, state, CH7006_BWIDTH);
414 ch7006_load_reg(client, state, CH7006_INPUT_FORMAT);
415 ch7006_load_reg(client, state, CH7006_CLKMODE);
416 ch7006_load_reg(client, state, CH7006_START_ACTIVE);
417 ch7006_load_reg(client, state, CH7006_POV);
418 ch7006_load_reg(client, state, CH7006_BLACK_LEVEL);
419 ch7006_load_reg(client, state, CH7006_HPOS);
420 ch7006_load_reg(client, state, CH7006_VPOS);
421 ch7006_load_reg(client, state, CH7006_INPUT_SYNC);
422 ch7006_load_reg(client, state, CH7006_DETECT);
423 ch7006_load_reg(client, state, CH7006_CONTRAST);
424 ch7006_load_reg(client, state, CH7006_PLLOV);
425 ch7006_load_reg(client, state, CH7006_PLLM);
426 ch7006_load_reg(client, state, CH7006_PLLN);
427 ch7006_load_reg(client, state, CH7006_BCLKOUT);
428 ch7006_load_reg(client, state, CH7006_SUBC_INC0);
429 ch7006_load_reg(client, state, CH7006_SUBC_INC1);
430 ch7006_load_reg(client, state, CH7006_SUBC_INC2);
431 ch7006_load_reg(client, state, CH7006_SUBC_INC3);
432 ch7006_load_reg(client, state, CH7006_SUBC_INC4);
433 ch7006_load_reg(client, state, CH7006_SUBC_INC5);
434 ch7006_load_reg(client, state, CH7006_SUBC_INC6);
435 ch7006_load_reg(client, state, CH7006_SUBC_INC7);
436 ch7006_load_reg(client, state, CH7006_PLL_CONTROL);
437 ch7006_load_reg(client, state, CH7006_CALC_SUBC_INC0);
438 }
439
ch7006_state_save(struct i2c_client * client,struct ch7006_state * state)440 void ch7006_state_save(struct i2c_client *client,
441 struct ch7006_state *state)
442 {
443 ch7006_save_reg(client, state, CH7006_POWER);
444
445 ch7006_save_reg(client, state, CH7006_DISPMODE);
446 ch7006_save_reg(client, state, CH7006_FFILTER);
447 ch7006_save_reg(client, state, CH7006_BWIDTH);
448 ch7006_save_reg(client, state, CH7006_INPUT_FORMAT);
449 ch7006_save_reg(client, state, CH7006_CLKMODE);
450 ch7006_save_reg(client, state, CH7006_START_ACTIVE);
451 ch7006_save_reg(client, state, CH7006_POV);
452 ch7006_save_reg(client, state, CH7006_BLACK_LEVEL);
453 ch7006_save_reg(client, state, CH7006_HPOS);
454 ch7006_save_reg(client, state, CH7006_VPOS);
455 ch7006_save_reg(client, state, CH7006_INPUT_SYNC);
456 ch7006_save_reg(client, state, CH7006_DETECT);
457 ch7006_save_reg(client, state, CH7006_CONTRAST);
458 ch7006_save_reg(client, state, CH7006_PLLOV);
459 ch7006_save_reg(client, state, CH7006_PLLM);
460 ch7006_save_reg(client, state, CH7006_PLLN);
461 ch7006_save_reg(client, state, CH7006_BCLKOUT);
462 ch7006_save_reg(client, state, CH7006_SUBC_INC0);
463 ch7006_save_reg(client, state, CH7006_SUBC_INC1);
464 ch7006_save_reg(client, state, CH7006_SUBC_INC2);
465 ch7006_save_reg(client, state, CH7006_SUBC_INC3);
466 ch7006_save_reg(client, state, CH7006_SUBC_INC4);
467 ch7006_save_reg(client, state, CH7006_SUBC_INC5);
468 ch7006_save_reg(client, state, CH7006_SUBC_INC6);
469 ch7006_save_reg(client, state, CH7006_SUBC_INC7);
470 ch7006_save_reg(client, state, CH7006_PLL_CONTROL);
471 ch7006_save_reg(client, state, CH7006_CALC_SUBC_INC0);
472
473 state->regs[CH7006_FFILTER] = (state->regs[CH7006_FFILTER] & 0xf0) |
474 (state->regs[CH7006_FFILTER] & 0x0c) >> 2 |
475 (state->regs[CH7006_FFILTER] & 0x03) << 2;
476 }
477