xref: /netbsd-src/sys/dev/mii/tlphyreg.h (revision 100a3398b8d3c64e571cff36b46c23431b410e09)
1 /*	$NetBSD: tlphyreg.h,v 1.5 2024/02/09 22:08:35 andvar Exp $	*/
2 
3 /*
4  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #ifndef _DEV_MII_TLPHYREG_H_
28 #define	_DEV_MII_TLPHYREG_H_
29 
30 /*
31  * Registers for the TI ThunderLAN internal PHY.
32  */
33 
34 #define	MII_TLPHY_ID	0x10	/* ThunderLAN PHY ID */
35 #define	ID_10BASETAUI	0x0001	/* 10baseT/AUI PHY */
36 
37 #define	MII_TLPHY_CTRL	0x11	/* Control register */
38 #define	CTRL_ILINK	0x8000	/* Ignore link */
39 #define	CTRL_SWPOL	0x4000	/* swap polarity */
40 #define	CTRL_AUISEL	0x2000	/* Select AUI */
41 #define	CTRL_SQEEN	0x1000	/* Enable SQE */
42 #define	CTRL_NFEW	0x0004	/* Not far end wrap */
43 #define	CTRL_INTEN	0x0002	/* Interrupts enable */
44 #define	CTRL_TINT	0x0001	/* Test Interrupts */
45 
46 #define	MII_TLPHY_ST	0x12	/* Status register */
47 #define	ST_MII_INT	0x8000	/* MII interrupt */
48 #define	ST_PHOK		0x4000	/* Power high OK */
49 #define	ST_POLOK	0x2000	/* Polarity OK */
50 #define	ST_TPE		0x1000	/* Twisted pair energy */
51 
52 #endif /* _DEV_MII_TLPHYREG_H_ */
53