1 /* $NetBSD: i82365_isapnp.c,v 1.34 2022/09/25 17:19:05 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1998 Bill Sommerfeld. All rights reserved.
5 * Copyright (c) 1997 Marc Horowitz. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Marc Horowitz.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: i82365_isapnp.c,v 1.34 2022/09/25 17:19:05 thorpej Exp $");
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <sys/extent.h>
40
41 #include <sys/bus.h>
42 #include <sys/intr.h>
43
44 #include <dev/isa/isareg.h>
45 #include <dev/isa/isavar.h>
46
47 #include <dev/isapnp/isapnpreg.h>
48 #include <dev/isapnp/isapnpvar.h>
49 #include <dev/isapnp/isapnpdevs.h>
50
51 #include <dev/pcmcia/pcmciareg.h>
52 #include <dev/pcmcia/pcmciavar.h>
53 #include <dev/pcmcia/pcmciachip.h>
54
55 #include <dev/ic/i82365reg.h>
56 #include <dev/ic/i82365var.h>
57 #include <dev/isa/i82365_isavar.h>
58
59 #undef DPRINTF
60 #ifdef PCICISADEBUG
61 int pcicisapnp_debug = 0 /* XXX */ ;
62 #define DPRINTF(arg) if (pcicisapnp_debug) printf arg;
63 #else
64 #define DPRINTF(arg)
65 #endif
66
67 int pcic_isapnp_match(device_t, cfdata_t, void *);
68 void pcic_isapnp_attach(device_t, device_t, void *);
69
70 CFATTACH_DECL_NEW(pcic_isapnp, sizeof(struct pcic_isa_softc),
71 pcic_isapnp_match, pcic_isapnp_attach, NULL, NULL);
72
73 static const struct pcmcia_chip_functions pcic_isa_functions = {
74 pcic_chip_mem_alloc,
75 pcic_chip_mem_free,
76 pcic_chip_mem_map,
77 pcic_chip_mem_unmap,
78
79 pcic_chip_io_alloc,
80 pcic_chip_io_free,
81 pcic_chip_io_map,
82 pcic_chip_io_unmap,
83
84 pcic_isa_chip_intr_establish,
85 pcic_isa_chip_intr_disestablish,
86
87 pcic_chip_socket_enable,
88 pcic_chip_socket_disable,
89 pcic_chip_socket_settype,
90 NULL,
91 };
92
93 int
pcic_isapnp_match(device_t parent,cfdata_t match,void * aux)94 pcic_isapnp_match(device_t parent, cfdata_t match, void *aux)
95 {
96 int pri, variant;
97
98 pri = isapnp_devmatch(aux, &isapnp_pcic_devinfo, &variant);
99 if (pri && variant > 0)
100 pri = 0;
101 return pri;
102 }
103
104 void
pcic_isapnp_attach(device_t parent,device_t self,void * aux)105 pcic_isapnp_attach(device_t parent, device_t self, void *aux)
106 {
107 struct pcic_isa_softc *isc = device_private(self);
108 struct pcic_softc *sc = &isc->sc_pcic;
109 struct isapnp_attach_args *ipa = aux;
110 isa_chipset_tag_t ic = ipa->ipa_ic;
111 bus_space_tag_t iot = ipa->ipa_iot;
112 bus_space_tag_t memt = ipa->ipa_memt;
113 bus_space_handle_t ioh;
114 bus_space_handle_t memh;
115 bus_addr_t maddr;
116 int msize;
117 int tmp1;
118
119 sc->dev = self;
120
121 aprint_naive("\n");
122 aprint_normal("\n");
123
124 if (isapnp_config(iot, memt, ipa)) {
125 aprint_error_dev(self, "error in region allocation\n");
126 return;
127 }
128
129 aprint_normal_dev(self, "%s %s", ipa->ipa_devident, ipa->ipa_devclass);
130
131 /* sanity check that we get at least one hunk of IO space.. */
132 if (ipa->ipa_nio < 1) {
133 aprint_error_dev(self,
134 "failed to get one chunk of i/o space\n");
135 return;
136 }
137
138 /* Find i/o space. */
139 ioh = ipa->ipa_io[0].h;
140
141 /* sanity check to make sure we have a real PCIC there.. */
142 bus_space_write_1(iot, ioh, PCIC_REG_INDEX, C0SA + PCIC_IDENT);
143 tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
144 aprint_normal("(ident 0x%x", tmp1);
145 if (pcic_ident_ok(tmp1)) {
146 aprint_normal(" OK)");
147 } else {
148 aprint_error(" Not OK)\n");
149 return;
150 }
151
152 msize = 0x4000;
153 if (isa_mem_alloc(memt, msize, msize, 0, 0, &maddr, &memh)) {
154 aprint_error(": can't alloc mem space\n");
155 return;
156 }
157 aprint_normal(": using iomem %#" PRIxPADDR " iosiz %#x", maddr, msize);
158 sc->membase = maddr;
159 sc->subregionmask = (1 << (msize / PCIC_MEM_PAGESIZE)) - 1;
160
161 isc->sc_ic = ic;
162 sc->pct = &pcic_isa_functions;
163
164 sc->iot = iot;
165 sc->ioh = ioh;
166 sc->memt = memt;
167 sc->memh = memh;
168
169 /*
170 * allocate an irq. it will be used by both controllers. I could
171 * use two different interrupts, but interrupts are relatively
172 * scarce, shareable, and for PCIC controllers, very infrequent.
173 */
174
175 if (ipa->ipa_nirq > 0)
176 sc->irq = ipa->ipa_irq[0].num;
177 else
178 sc->irq = -1;
179
180 aprint_normal("\n");
181
182 pcic_attach(sc);
183 pcic_isa_bus_width_probe(sc, iot, ioh, ipa->ipa_io[0].base,
184 ipa->ipa_io[0].length);
185 pcic_attach_sockets(sc);
186 config_interrupts(self, pcic_isa_config_interrupts);
187 }
188