1 /* $NetBSD: ns16550reg.h,v 1.14 2022/10/06 19:59:55 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 1991 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the University nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * @(#)ns16550.h 7.1 (Berkeley) 5/9/91 32 */ 33 34 #ifndef _SYS_DEV_IC_NS16550REG_H_ 35 #define _SYS_DEV_IC_NS16550REG_H_ 36 37 /* 38 * NS16550 UART registers 39 */ 40 41 #define com_data 0 /* data register (R/W) */ 42 #define com_dlbl 0 /* divisor latch low (W) */ 43 #define com_dlbh 1 /* divisor latch high (W) */ 44 #define com_ier 1 /* interrupt enable (W) */ 45 #define com_iir 2 /* interrupt identification (R) */ 46 #define com_fifo 2 /* FIFO control (W) */ 47 #define com_lctl 3 /* line control register (R/W) */ 48 #define com_cfcr 3 /* line control register (R/W) */ 49 #define com_lcr com_cfcr 50 #define com_mcr 4 /* modem control register (R/W) */ 51 #define com_lsr 5 /* line status register (R/W) */ 52 #define com_msr 6 /* modem status register (R/W) */ 53 #define com_scratch 7 /* scratch register (R/W) */ 54 55 /* 56 * Additional registers present on TI OMAP hardware 57 */ 58 #define com_mdr1 8 /* mode definition register 1 (OMAP) */ 59 60 /* 61 * Additional register present in NS16750 62 */ 63 #define com_usr 31 /* status register (R) (16750/SUNXI) */ 64 65 /* 66 * Additional registers present on Allwinner hardware 67 */ 68 #define com_tfl 32 /* transmit fifo level (R) (SUNXI) */ 69 #define com_rfl 33 /* receive fifo level (R) (SUNXI) */ 70 #define com_halt 41 /* halt tx (R/W) (SUNXI) */ 71 72 #endif /* _SYS_DEV_IC_NS16550REG_H_ */ 73