1 /* $NetBSD: rs5c372reg.h,v 1.3 2012/01/21 19:44:30 nonaka Exp $ */ 2 3 /*- 4 * Copyright (C) 2005 NONAKA Kimihiro <nonaka@netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #ifndef _DEV_I2C_RS5C372REG_H_ 29 #define _DEV_I2C_RS5C372REG_H_ 30 31 /* 32 * RS5C372[AB] Real-Time Clock 33 */ 34 35 #define RS5C372_ADDR 0x32 /* Fixed I2C Slave Address */ 36 37 #define RS5C372_SECONDS 0 38 #define RS5C372_MINUTES 1 39 #define RS5C372_HOURS 2 40 #define RS5C372_DAY 3 41 #define RS5C372_DATE 4 42 #define RS5C372_MONTH 5 43 #define RS5C372_YEAR 6 44 #define RS5C372_CLOCK_CORRECT 7 45 #define RS5C372_ALARMA_MIN 8 46 #define RS5C372_ALARMA_HOUR 9 47 #define RS5C372_ALARMA_DATE 10 48 #define RS5C372_ALARMB_MIN 11 49 #define RS5C372_ALARMB_HOUR 12 50 #define RS5C372_ALARMB_DATE 13 51 #define RS5C372_CONTROL1 14 52 #define RS5C372_CONTROL2 15 53 #define RS5C372_NREGS 16 54 #define RS5C372_NRTC_REGS 7 55 56 /* 57 * Bit definitions. 58 */ 59 #define RS5C372_SECONDS_MASK 0x7f 60 #define RS5C372_MINUTES_MASK 0x7f 61 #define RS5C372_HOURS_12HRS_PM (1u << 5) /* If 12 hr mode, set = PM */ 62 #define RS5C372_HOURS_12MASK 0x1f 63 #define RS5C372_HOURS_24MASK 0x3f 64 #define RS5C372_DAY_MASK 0x07 65 #define RS5C372_DATE_MASK 0x3f 66 #define RS5C372_MONTH_MASK 0x1f 67 #define RS5C372_CONTROL2_24HRS (1u << 5) 68 #define RS5C372_CONTROL2_XSTP (1u << 4) /* read */ 69 #define RS5C372_CONTROL2_ADJ (1u << 4) /* write */ 70 #define RS5C372_CONTROL2_NCLEN (1u << 3) 71 #define RS5C372_CONTROL2_CTFG (1u << 2) 72 #define RS5C372_CONTROL2_AAFG (1u << 1) 73 #define RS5C372_CONTROL2_BAFG (1u << 0) 74 75 #endif /* _DEV_I2C_RS5C372REG_H_ */ 76