xref: /netbsd-src/sys/dev/i2c/m41st84reg.h (revision ed25b5806002abfdae417d7186a98a3842ba59c6)
1 /*	$NetBSD: m41st84reg.h,v 1.4 2023/01/23 22:20:59 andvar Exp $	*/
2 
3 /*
4  * Copyright (c) 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef _DEV_I2C_M41ST84REG_H_
39 #define	_DEV_I2C_M41ST84REG_H_
40 
41 #define M41ST84_ADDR	0x68
42 
43 #define	M41ST84_REG_CSEC	0	/* 00-99     -- BCD Centiseconds */
44 #define M41ST84_REG_SEC		1	/* 00-59     -- BCD Seconds */
45 #define M41ST84_REG_MIN		2	/* 00-59     -- BCD Minutes */
46 #define M41ST84_REG_CENHR	3	/* 0-1/00-23 -- BCD Century/Hour */
47 #define M41ST84_REG_DAY		4	/* 01-07     -- BCD Day */
48 #define M41ST84_REG_DATE	5	/* 01-31     -- BCD Date */
49 #define M41ST84_REG_MONTH	6	/* 01-12     -- BCD Month */
50 #define M41ST84_REG_YEAR	7	/* 00-99     -- BCD Year */
51 #define M41ST84_REG_DATE_BYTES	8
52 #define M41ST84_REG_CONTROL	8	/* Control Register */
53 #define	M41ST84_REG_WATCHDOG	9	/* Watchdog Register */
54 #define	M41ST84_REG_AL_MONTH	10	/* 01-12     -- BCD Month */
55 #define	M41ST84_REG_AL_DATE	11	/* 01-31     -- BCD Date */
56 #define	M41ST84_REG_AL_HOUR	12	/* 00-23     -- BCD Hour */
57 #define	M41ST84_REG_AL_MIN	13	/* 00-59     -- BCD Minutes */
58 #define	M41ST84_REG_AL_SEC	14	/* 00-59     -- BCD Seconds */
59 #define	M41ST84_REG_FLAGS	15	/* Flags Register */
60 			/*	16-18	reserved	*/
61 #define	M41ST84_REG_SQW		19	/* Square Wave Register */
62 #define	M41ST84_USER_RAM	20
63 #define	M41ST84_USER_RAM_SIZE	43
64 
65 #define M41ST84_SEC_MASK	0x7f
66 #define M41ST84_MIN_MASK	0x7f
67 #define M41ST84_HOUR_MASK	0x3f
68 #define M41ST84_DAY_MASK	0x07
69 #define M41ST84_DATE_MASK	0x3f
70 #define M41ST84_MONTH_MASK	0x1f
71 #define M41ST84_YEAR_MASK	0xff
72 
73 #define	M41ST84_SEC_ST		0x80		/* clock stop bit */
74 
75 #define	M41ST84_CONTROL_CALIB_MASK	0x1f
76 #define	M41ST84_CONTROL_S		0x20	/* sign bit */
77 #define	M41ST84_CONTROL_FT		0x40	/* Frequency test bit */
78 #define	M41ST84_CONTROL_OUT		0x80	/* Output level */
79 
80 #define	M41ST84_WATCHDOG_RB_MASK	0x03	/* Watchdog resolution bits */
81 #define	M41ST84_WATCHDOG_BMB_MASK	0x7c	/* Watchdog multiplier bits */
82 #define	M41ST84_WATCHDOG_WDS		0x80	/* Watchdog steering bit */
83 
84 #define	M41ST84_AL_MONTH_ABE		0x20	/* alarm in b-backup mode en */
85 #define	M41ST84_AL_MONTH_SQWE		0x40	/* square wave enable */
86 #define	M41ST84_AL_MONTH_AFE		0x80	/* alarm flag enable */
87 
88 #define	M41ST84_AL_HOUR_HT		0x40	/* Halt Update Bit */
89 
90 #define	M41ST84_FLAGS_BL		0x10	/* battery low flag */
91 #define	M41ST84_FLAGS_AF		0x40	/* alarm flag */
92 #define	M41ST84_FLAGS_WDF		0x80	/* watchdog flag */
93 
94 #endif /* _DEV_I2C_M41ST84REG_H_ */
95