1 /* $NetBSD: njs_cardbus.c,v 1.18 2016/07/11 11:31:50 msaitoh Exp $ */
2
3 /*-
4 * Copyright (c) 2004 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by ITOH Yasufumi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: njs_cardbus.c,v 1.18 2016/07/11 11:31:50 msaitoh Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/device.h>
39
40 #include <sys/bus.h>
41 #include <sys/intr.h>
42
43 #include <dev/scsipi/scsi_all.h>
44 #include <dev/scsipi/scsipi_all.h>
45 #include <dev/scsipi/scsiconf.h>
46
47 #include <dev/cardbus/cardbusvar.h>
48 #include <dev/pci/pcidevs.h>
49
50 #include <dev/ic/ninjascsi32reg.h>
51 #include <dev/ic/ninjascsi32var.h>
52
53 #define NJSC32_CARDBUS_BASEADDR_IO PCI_BAR0
54 #define NJSC32_CARDBUS_BASEADDR_MEM PCI_BAR1
55
56 struct njsc32_cardbus_softc {
57 struct njsc32_softc sc_njsc32;
58
59 /* CardBus-specific goo */
60 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
61 pcitag_t sc_tag;
62
63 bus_space_handle_t sc_regmaph;
64 bus_size_t sc_regmap_size;
65 };
66
67 static int njs_cardbus_match(device_t, cfdata_t, void *);
68 static void njs_cardbus_attach(device_t, device_t, void *);
69 static int njs_cardbus_detach(device_t, int);
70
71 CFATTACH_DECL_NEW(njs_cardbus, sizeof(struct njsc32_cardbus_softc),
72 njs_cardbus_match, njs_cardbus_attach, njs_cardbus_detach, NULL);
73
74 static const struct njsc32_cardbus_product {
75 pci_vendor_id_t p_vendor;
76 pci_product_id_t p_product;
77 njsc32_model_t p_model;
78 int p_clk; /* one of NJSC32_CLK_* */
79 } njsc32_cardbus_products[] = {
80 { PCI_VENDOR_IODATA, PCI_PRODUCT_IODATA_CBSCII,
81 NJSC32_MODEL_32BI, NJSC32_CLK_40M },
82 { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32BI,
83 NJSC32_MODEL_32BI, NJSC32_CLK_40M },
84 { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE,
85 NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M },
86 { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32BI_KME,
87 NJSC32_MODEL_32BI, NJSC32_CLK_40M },
88
89 { 0, 0,
90 NJSC32_MODEL_INVALID, 0 },
91 };
92
93 static const struct njsc32_cardbus_product *
njs_cardbus_lookup(const struct cardbus_attach_args * ca)94 njs_cardbus_lookup(const struct cardbus_attach_args *ca)
95 {
96 const struct njsc32_cardbus_product *p;
97
98 for (p = njsc32_cardbus_products;
99 p->p_model != NJSC32_MODEL_INVALID; p++) {
100 if (PCI_VENDOR(ca->ca_id) == p->p_vendor &&
101 PCI_PRODUCT(ca->ca_id) == p->p_product)
102 return p;
103 }
104
105 return NULL;
106 }
107
108 static int
njs_cardbus_match(device_t parent,cfdata_t match,void * aux)109 njs_cardbus_match(device_t parent, cfdata_t match, void *aux)
110 {
111 struct cardbus_attach_args *ca = aux;
112
113 if (njs_cardbus_lookup(ca))
114 return 1;
115
116 return 0;
117 }
118
119 static void
njs_cardbus_attach(device_t parent,device_t self,void * aux)120 njs_cardbus_attach(device_t parent, device_t self, void *aux)
121 {
122 struct cardbus_attach_args *ca = aux;
123 struct njsc32_cardbus_softc *csc = device_private(self);
124 struct njsc32_softc *sc = &csc->sc_njsc32;
125 const struct njsc32_cardbus_product *prod;
126 cardbus_devfunc_t ct = ca->ca_ct;
127 pcireg_t csr, reg;
128 u_int8_t latency = 0x20;
129
130 if ((prod = njs_cardbus_lookup(ca)) == NULL)
131 panic("njs_cardbus_attach");
132
133 printf(": Workbit NinjaSCSI-32 SCSI adapter\n");
134 sc->sc_dev = self;
135 sc->sc_model = prod->p_model;
136 sc->sc_clk = prod->p_clk;
137
138 csc->sc_ct = ct;
139 csc->sc_tag = ca->ca_tag;
140
141 /*
142 * Map the device.
143 */
144 csr = PCI_COMMAND_MASTER_ENABLE;
145
146 /*
147 * Map registers.
148 * Try memory map first, and then try I/O.
149 */
150 if (Cardbus_mapreg_map(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_MEM,
151 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
152 &sc->sc_regt, &csc->sc_regmaph, NULL, &csc->sc_regmap_size) == 0) {
153 if (bus_space_subregion(sc->sc_regt, csc->sc_regmaph,
154 NJSC32_MEMOFFSET_REG, NJSC32_REGSIZE, &sc->sc_regh) != 0) {
155 /* failed -- undo map and try I/O */
156 Cardbus_mapreg_unmap(csc->sc_ct,
157 NJSC32_CARDBUS_BASEADDR_MEM,
158 sc->sc_regt, csc->sc_regmaph, csc->sc_regmap_size);
159 goto try_io;
160 }
161 #ifdef NJSC32_DEBUG
162 printf("%s: memory space mapped\n", device_xname(self));
163 #endif
164 csr |= PCI_COMMAND_MEM_ENABLE;
165 sc->sc_flags = NJSC32_MEM_MAPPED;
166 } else {
167 try_io:
168 if (Cardbus_mapreg_map(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_IO,
169 PCI_MAPREG_TYPE_IO, 0, &sc->sc_regt, &sc->sc_regh,
170 NULL, &csc->sc_regmap_size) == 0) {
171 #ifdef NJSC32_DEBUG
172 printf("%s: io space mapped\n", device_xname(self));
173 #endif
174 csr |= PCI_COMMAND_IO_ENABLE;
175 sc->sc_flags = NJSC32_IO_MAPPED;
176 } else {
177 aprint_error_dev(self,
178 "unable to map device registers\n");
179 return;
180 }
181 }
182
183 /* Enable the appropriate bits in the PCI CSR. */
184 reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG);
185 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
186 reg |= csr;
187 Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg);
188
189 /*
190 * Make sure the latency timer is set to some reasonable
191 * value.
192 */
193 reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_BHLC_REG);
194 if (PCI_LATTIMER(reg) < latency) {
195 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
196 reg |= (latency << PCI_LATTIMER_SHIFT);
197 Cardbus_conf_write(ct, ca->ca_tag, PCI_BHLC_REG, reg);
198 }
199
200 sc->sc_dmat = ca->ca_dmat;
201
202 /*
203 * Establish the interrupt.
204 */
205 sc->sc_ih = Cardbus_intr_establish(ct, IPL_BIO, njsc32_intr, sc);
206 if (sc->sc_ih == NULL) {
207 aprint_error_dev(self, "unable to establish interrupt\n");
208 return;
209 }
210
211 /* CardBus device cannot supply termination power. */
212 sc->sc_flags |= NJSC32_CANNOT_SUPPLY_TERMPWR;
213
214 /* attach */
215 njsc32_attach(sc);
216 }
217
218 static int
njs_cardbus_detach(device_t self,int flags)219 njs_cardbus_detach(device_t self, int flags)
220 {
221 struct njsc32_cardbus_softc *csc = device_private(self);
222 struct njsc32_softc *sc = &csc->sc_njsc32;
223 int rv;
224
225 rv = njsc32_detach(sc, flags);
226 if (rv)
227 return rv;
228
229 if (sc->sc_ih)
230 Cardbus_intr_disestablish(csc->sc_ct, sc->sc_ih);
231
232 if (sc->sc_flags & NJSC32_IO_MAPPED)
233 Cardbus_mapreg_unmap(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_IO,
234 sc->sc_regt, sc->sc_regh, csc->sc_regmap_size);
235 if (sc->sc_flags & NJSC32_MEM_MAPPED)
236 Cardbus_mapreg_unmap(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_MEM,
237 sc->sc_regt, csc->sc_regmaph, csc->sc_regmap_size);
238
239 return 0;
240 }
241