1/* $NetBSD: zaurus_start.S,v 1.1 2006/12/16 05:57:48 ober Exp $ */ 2/* $OpenBSD: zaurus_start.S,v 1.2 2005/01/02 19:43:07 drahn Exp $ */ 3 4/* 5 * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of Genetec Corporation may not be used to endorse or 17 * promote products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <machine/asm.h> 34#include <arm/armreg.h> 35#include <arm/arm32/pte.h> 36#include <arm/arm32/pmap.h> /* for PMAP_DOMAIN_KERNEL */ 37 38/* 39 * CPWAIT -- Canonical method to wait for CP15 update. 40 * NOTE: Clobbers the specified temp reg. 41 * copied from arm/arm/cpufunc_asm_xscale.S 42 * XXX: better be in a common header file. 43 */ 44#define CPWAIT_BRANCH \ 45 sub pc, pc, #4 46 47#define CPWAIT(tmp) \ 48 mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ;\ 49 mov tmp, tmp /* wait for it to complete */ ;\ 50 CPWAIT_BRANCH /* branch to next insn */ 51 52/* 53 * Kernel start routine for Zaurus 54 */ 55 .text 56 57 .global _C_LABEL(zaurus_start) 58_C_LABEL(zaurus_start): 59 /* 60 * Kernel is loaded in SDRAM (0xa0200000..), and is expected to run 61 * in VA 0xc0200000.. 62 */ 63 64 /* build page table from scratch */ 65 ldr r0, Lstartup_pagetable 66 adr r4, mmu_init_table 67 b 3f 68 692: 70 str r3, [r0, r2] 71 add r2, r2, #4 72 add r3, r3, #(L1_S_SIZE) 73 adds r1, r1, #-1 74 bhi 2b 753: 76 ldmia r4!, {r1,r2,r3} /* # of sections, PA|attr, VA */ 77 cmp r1, #0 78 bne 2b 79 80 mcr p15, 0, r0, c2, c0, 0 /* Set TTB */ 81 mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */ 82 83 /* Set the Domain Access register. Very important! */ 84 mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT) 85 mcr p15, 0, r0, c3, c0, 0 86 87 /* Enable MMU */ 88 mrc p15, 0, r0, c1, c0, 0 89 orr r0, r0, #CPU_CONTROL_SYST_ENABLE 90 orr r0, r0, #CPU_CONTROL_MMU_ENABLE 91 mcr p15, 0, r0, c1, c0, 0 92 CPWAIT(r0) 93 94 /* Jump to kernel code in TRUE VA */ 95 adr r0, Lstart 96 ldr pc, [r0] 97 98Lstart: 99 .word start 100 101#define MMU_INIT(va,pa,n_sec,attr) \ 102 .word (n_sec); \ 103 .word 4 * ((va) >> L1_S_SHIFT); \ 104 .word (pa)|(attr); 105 106Lstartup_pagetable: 107 .word 0xa0004000 108 109mmu_init_table: 110 /* fill all table VA==PA */ 111 MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW)) 112 /* map SDRAM VA==PA, WT cacheable */ 113 MMU_INIT(0xa0000000, 0xa0000000, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) 114 /* map VA 0xc0000000..0xc3ffffff to PA 0xa0000000..0xa3ffffff */ 115 MMU_INIT(0xc0000000, 0xa0000000, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) 116 117 .word 0,0,0 /* end of table */ 118