1 /* $NetBSD: isadma_machdep.c,v 1.4 2007/03/07 17:22:27 he Exp $ */ 2 3 /*- 4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: isadma_machdep.c,v 1.4 2007/03/07 17:22:27 he Exp $"); 42 43 #define ISA_DMA_STATS 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/syslog.h> 48 #include <sys/device.h> 49 #include <sys/malloc.h> 50 #include <sys/proc.h> 51 #include <sys/mbuf.h> 52 53 #define _POWERPC_BUS_DMA_PRIVATE 54 #include <machine/bus.h> 55 56 #include <machine/pio.h> 57 58 #include <dev/isa/isareg.h> 59 #include <dev/isa/isavar.h> 60 61 #include <uvm/uvm.h> 62 63 /* 64 * Cookie used by ISA dma. A pointer to one of these it stashed in 65 * the DMA map. 66 */ 67 struct powerpc_isa_dma_cookie { 68 int id_flags; /* flags; see below */ 69 70 /* 71 * Information about the original buffer used during 72 * DMA map syncs. Note that origbuflen is only used 73 * for ID_BUFTYPE_LINEAR. 74 */ 75 void *id_origbuf; /* pointer to orig buffer if 76 bouncing */ 77 bus_size_t id_origbuflen; /* ...and size */ 78 int id_buftype; /* type of buffer */ 79 80 void *id_bouncebuf; /* pointer to the bounce buffer */ 81 bus_size_t id_bouncebuflen; /* ...and size */ 82 int id_nbouncesegs; /* number of valid bounce segs */ 83 bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer 84 physical memory segments */ 85 }; 86 87 /* id_flags */ 88 #define ID_MIGHT_NEED_BOUNCE 0x01 /* map could need bounce buffers */ 89 #define ID_HAS_BOUNCE 0x02 /* map currently has bounce buffers */ 90 #define ID_IS_BOUNCING 0x04 /* map is bouncing current xfer */ 91 92 /* id_buftype */ 93 #define ID_BUFTYPE_INVALID 0 94 #define ID_BUFTYPE_LINEAR 1 95 #define ID_BUFTYPE_MBUF 2 96 #define ID_BUFTYPE_UIO 3 97 #define ID_BUFTYPE_RAW 4 98 99 static int _isa_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, 100 bus_size_t, bus_size_t, int, bus_dmamap_t *); 101 static void _isa_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 102 static int _isa_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 103 bus_size_t, struct proc *, int); 104 static int _isa_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 105 struct mbuf *, int); 106 static int _isa_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 107 struct uio *, int); 108 static int _isa_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 109 bus_dma_segment_t *, int, bus_size_t, int); 110 static void _isa_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 111 static void _isa_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, 112 bus_addr_t, bus_size_t, int); 113 114 static int _isa_bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, 115 bus_size_t, bus_dma_segment_t *, int, int *, int); 116 117 static int _isa_dma_alloc_bouncebuf(bus_dma_tag_t, bus_dmamap_t, 118 bus_size_t, int); 119 static void _isa_dma_free_bouncebuf(bus_dma_tag_t, bus_dmamap_t); 120 121 /* 122 * Entry points for ISA DMA. These are mostly wrappers around 123 * the generic functions that understand how to deal with bounce 124 * buffers, if necessary. 125 */ 126 struct powerpc_bus_dma_tag isa_bus_dma_tag = { 127 ISA_DMA_BOUNCE_THRESHOLD, 128 _isa_bus_dmamap_create, 129 _isa_bus_dmamap_destroy, 130 _isa_bus_dmamap_load, 131 _isa_bus_dmamap_load_mbuf, 132 _isa_bus_dmamap_load_uio, 133 _isa_bus_dmamap_load_raw, 134 _isa_bus_dmamap_unload, 135 _isa_bus_dmamap_sync, 136 _isa_bus_dmamem_alloc, 137 _bus_dmamem_free, 138 _bus_dmamem_map, 139 _bus_dmamem_unmap, 140 _bus_dmamem_mmap, 141 }; 142 143 /********************************************************************** 144 * bus.h dma interface entry points 145 **********************************************************************/ 146 147 #ifdef ISA_DMA_STATS 148 #define STAT_INCR(v) (v)++ 149 #define STAT_DECR(v) do { \ 150 if ((v) == 0) \ 151 printf("%s:%d -- Already 0!\n", __FILE__, __LINE__); \ 152 else \ 153 (v)--; \ 154 } while (0) 155 u_long isa_dma_stats_loads; 156 u_long isa_dma_stats_bounces; 157 u_long isa_dma_stats_nbouncebufs; 158 #else 159 #define STAT_INCR(v) 160 #define STAT_DECR(v) 161 #endif 162 163 /* 164 * Create an ISA DMA map. 165 */ 166 int 167 _isa_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments, 168 bus_size_t maxsegsz, bus_size_t boundary, int flags, 169 bus_dmamap_t *dmamp) 170 { 171 struct powerpc_isa_dma_cookie *cookie; 172 bus_dmamap_t map; 173 int error, cookieflags, bank; 174 void *cookiestore; 175 size_t cookiesize; 176 paddr_t avail_end = 0; 177 178 for (bank = 0; bank < vm_nphysseg; bank++) { 179 if (avail_end < vm_physmem[bank].avail_end << PGSHIFT) 180 avail_end = vm_physmem[bank].avail_end << PGSHIFT; 181 } 182 183 /* Call common function to create the basic map. */ 184 error = _bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, 185 flags, dmamp); 186 if (error) 187 return (error); 188 189 map = *dmamp; 190 map->_dm_cookie = NULL; 191 192 cookiesize = sizeof(struct powerpc_isa_dma_cookie); 193 194 /* 195 * ISA only has 24-bits of address space. This means 196 * we can't DMA to pages over 16M. In order to DMA to 197 * arbitrary buffers, we use "bounce buffers" - pages 198 * in memory below the 16M boundary. On DMA reads, 199 * DMA happens to the bounce buffers, and is copied into 200 * the caller's buffer. On writes, data is copied into 201 * but bounce buffer, and the DMA happens from those 202 * pages. To software using the DMA mapping interface, 203 * this looks simply like a data cache. 204 * 205 * If we have more than 16M of RAM in the system, we may 206 * need bounce buffers. We check and remember that here. 207 * 208 * There are exceptions, however. VLB devices can do 209 * 32-bit DMA, and indicate that here. 210 * 211 * ...or, there is an opposite case. The most segments 212 * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If 213 * the caller can't handle that many segments (e.g. the 214 * ISA DMA controller), we may have to bounce it as well. 215 */ 216 if (avail_end <= t->_bounce_thresh || 217 (flags & ISABUS_DMA_32BIT) != 0) { 218 /* Bouncing not necessary due to memory size. */ 219 map->_dm_bounce_thresh = 0; 220 } 221 cookieflags = 0; 222 if (map->_dm_bounce_thresh != 0 || 223 ((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt) { 224 cookieflags |= ID_MIGHT_NEED_BOUNCE; 225 cookiesize += (sizeof(bus_dma_segment_t) * map->_dm_segcnt); 226 } 227 228 /* 229 * Allocate our cookie. 230 */ 231 if ((cookiestore = malloc(cookiesize, M_DMAMAP, 232 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) { 233 error = ENOMEM; 234 goto out; 235 } 236 memset(cookiestore, 0, cookiesize); 237 cookie = (struct powerpc_isa_dma_cookie *)cookiestore; 238 cookie->id_flags = cookieflags; 239 map->_dm_cookie = cookie; 240 241 if (cookieflags & ID_MIGHT_NEED_BOUNCE) { 242 /* 243 * Allocate the bounce pages now if the caller 244 * wishes us to do so. 245 */ 246 if ((flags & BUS_DMA_ALLOCNOW) == 0) 247 goto out; 248 249 error = _isa_dma_alloc_bouncebuf(t, map, size, flags); 250 } 251 252 out: 253 if (error) { 254 if (map->_dm_cookie != NULL) 255 free(map->_dm_cookie, M_DMAMAP); 256 _bus_dmamap_destroy(t, map); 257 } 258 return (error); 259 } 260 261 /* 262 * Destroy an ISA DMA map. 263 */ 264 void 265 _isa_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map) 266 { 267 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie; 268 269 /* 270 * Free any bounce pages this map might hold. 271 */ 272 if (cookie->id_flags & ID_HAS_BOUNCE) 273 _isa_dma_free_bouncebuf(t, map); 274 275 free(cookie, M_DMAMAP); 276 _bus_dmamap_destroy(t, map); 277 } 278 279 /* 280 * Load an ISA DMA map with a linear buffer. 281 */ 282 int 283 _isa_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf, 284 bus_size_t buflen, struct proc *p, int flags) 285 { 286 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie; 287 int error; 288 289 STAT_INCR(isa_dma_stats_loads); 290 291 /* 292 * Make sure that on error condition we return "no valid mappings." 293 */ 294 map->dm_mapsize = 0; 295 map->dm_nsegs = 0; 296 297 /* 298 * Try to load the map the normal way. If this errors out, 299 * and we can bounce, we will. 300 */ 301 error = _bus_dmamap_load(t, map, buf, buflen, p, flags); 302 if (error == 0 || 303 (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0)) 304 return (error); 305 306 /* 307 * First attempt failed; bounce it. 308 */ 309 310 STAT_INCR(isa_dma_stats_bounces); 311 312 /* 313 * Allocate bounce pages, if necessary. 314 */ 315 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) { 316 error = _isa_dma_alloc_bouncebuf(t, map, buflen, flags); 317 if (error) 318 return (error); 319 } 320 321 /* 322 * Cache a pointer to the caller's buffer and load the DMA map 323 * with the bounce buffer. 324 */ 325 cookie->id_origbuf = buf; 326 cookie->id_origbuflen = buflen; 327 cookie->id_buftype = ID_BUFTYPE_LINEAR; 328 error = _bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen, 329 p, flags); 330 if (error) { 331 /* 332 * Free the bounce pages, unless our resources 333 * are reserved for our exclusive use. 334 */ 335 if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0) 336 _isa_dma_free_bouncebuf(t, map); 337 return (error); 338 } 339 340 /* ...so _isa_bus_dmamap_sync() knows we're bouncing */ 341 cookie->id_flags |= ID_IS_BOUNCING; 342 return (0); 343 } 344 345 /* 346 * Like _isa_bus_dmamap_load(), but for mbufs. 347 */ 348 int 349 _isa_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0, 350 int flags) 351 { 352 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie; 353 int error; 354 355 /* 356 * Make sure that on error condition we return "no valid mappings." 357 */ 358 map->dm_mapsize = 0; 359 map->dm_nsegs = 0; 360 361 #ifdef DIAGNOSTIC 362 if ((m0->m_flags & M_PKTHDR) == 0) 363 panic("_isa_bus_dmamap_load_mbuf: no packet header"); 364 #endif 365 366 if (m0->m_pkthdr.len > map->_dm_size) 367 return (EINVAL); 368 369 /* 370 * Try to load the map the normal way. If this errors out, 371 * and we can bounce, we will. 372 */ 373 error = _bus_dmamap_load_mbuf(t, map, m0, flags); 374 if (error == 0 || 375 (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0)) 376 return (error); 377 378 /* 379 * First attempt failed; bounce it. 380 */ 381 382 STAT_INCR(isa_dma_stats_bounces); 383 384 /* 385 * Allocate bounce pages, if necessary. 386 */ 387 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) { 388 error = _isa_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len, 389 flags); 390 if (error) 391 return (error); 392 } 393 394 /* 395 * Cache a pointer to the caller's buffer and load the DMA map 396 * with the bounce buffer. 397 */ 398 cookie->id_origbuf = m0; 399 cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */ 400 cookie->id_buftype = ID_BUFTYPE_MBUF; 401 error = _bus_dmamap_load(t, map, cookie->id_bouncebuf, 402 m0->m_pkthdr.len, NULL, flags); 403 if (error) { 404 /* 405 * Free the bounce pages, unless our resources 406 * are reserved for our exclusive use. 407 */ 408 if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0) 409 _isa_dma_free_bouncebuf(t, map); 410 return (error); 411 } 412 413 /* ...so _isa_bus_dmamap_sync() knows we're bouncing */ 414 cookie->id_flags |= ID_IS_BOUNCING; 415 return (0); 416 } 417 418 /* 419 * Like _isa_bus_dmamap_load(), but for uios. 420 */ 421 int 422 _isa_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, 423 struct uio *uio, int flags) 424 { 425 426 panic("_isa_bus_dmamap_load_uio: not implemented"); 427 } 428 429 /* 430 * Like _isa_bus_dmamap_load(), but for raw memory allocated with 431 * bus_dmamem_alloc(). 432 */ 433 int 434 _isa_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map, 435 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags) 436 { 437 438 panic("_isa_bus_dmamap_load_raw: not implemented"); 439 } 440 441 /* 442 * Unload an ISA DMA map. 443 */ 444 void 445 _isa_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map) 446 { 447 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie; 448 449 /* 450 * If we have bounce pages, free them, unless they're 451 * reserved for our exclusive use. 452 */ 453 if ((cookie->id_flags & ID_HAS_BOUNCE) && 454 (map->_dm_flags & BUS_DMA_ALLOCNOW) == 0) 455 _isa_dma_free_bouncebuf(t, map); 456 457 cookie->id_flags &= ~ID_IS_BOUNCING; 458 cookie->id_buftype = ID_BUFTYPE_INVALID; 459 460 /* 461 * Do the generic bits of the unload. 462 */ 463 _bus_dmamap_unload(t, map); 464 } 465 466 /* 467 * Synchronize an ISA DMA map. 468 */ 469 void 470 _isa_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, 471 bus_size_t len, int ops) 472 { 473 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie; 474 475 /* 476 * Mixing PRE and POST operations is not allowed. 477 */ 478 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 && 479 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0) 480 panic("_isa_bus_dmamap_sync: mix PRE and POST"); 481 482 #ifdef DIAGNOSTIC 483 if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) { 484 if (offset >= map->dm_mapsize) 485 panic("_isa_bus_dmamap_sync: bad offset"); 486 if (len == 0 || (offset + len) > map->dm_mapsize) 487 panic("_isa_bus_dmamap_sync: bad length"); 488 } 489 #endif 490 491 /* 492 * If we're not bouncing, just return; nothing to do. 493 */ 494 if ((cookie->id_flags & ID_IS_BOUNCING) == 0) 495 return; 496 497 switch (cookie->id_buftype) { 498 case ID_BUFTYPE_LINEAR: 499 /* 500 * Nothing to do for pre-read. 501 */ 502 503 if (ops & BUS_DMASYNC_PREWRITE) { 504 /* 505 * Copy the caller's buffer to the bounce buffer. 506 */ 507 memcpy((char *)cookie->id_bouncebuf + offset, 508 (char *)cookie->id_origbuf + offset, len); 509 } 510 511 if (ops & BUS_DMASYNC_POSTREAD) { 512 /* 513 * Copy the bounce buffer to the caller's buffer. 514 */ 515 memcpy((char *)cookie->id_origbuf + offset, 516 (char *)cookie->id_bouncebuf + offset, len); 517 } 518 519 /* 520 * Nothing to do for post-write. 521 */ 522 break; 523 524 case ID_BUFTYPE_MBUF: 525 { 526 struct mbuf *m, *m0 = cookie->id_origbuf; 527 bus_size_t minlen, moff; 528 529 /* 530 * Nothing to do for pre-read. 531 */ 532 533 if (ops & BUS_DMASYNC_PREWRITE) { 534 /* 535 * Copy the caller's buffer to the bounce buffer. 536 */ 537 m_copydata(m0, offset, len, 538 (char *)cookie->id_bouncebuf + offset); 539 } 540 541 if (ops & BUS_DMASYNC_POSTREAD) { 542 /* 543 * Copy the bounce buffer to the caller's buffer. 544 */ 545 for (moff = offset, m = m0; m != NULL && len != 0; 546 m = m->m_next) { 547 /* Find the beginning mbuf. */ 548 if (moff >= m->m_len) { 549 moff -= m->m_len; 550 continue; 551 } 552 553 /* 554 * Now at the first mbuf to sync; nail 555 * each one until we have exhausted the 556 * length. 557 */ 558 minlen = len < m->m_len - moff ? 559 len : m->m_len - moff; 560 561 memcpy(mtod(m, char *) + moff, 562 (char *)cookie->id_bouncebuf + offset, 563 minlen); 564 565 moff = 0; 566 len -= minlen; 567 offset += minlen; 568 } 569 } 570 571 /* 572 * Nothing to do for post-write. 573 */ 574 break; 575 } 576 577 case ID_BUFTYPE_UIO: 578 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_UIO"); 579 break; 580 581 case ID_BUFTYPE_RAW: 582 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_RAW"); 583 break; 584 585 case ID_BUFTYPE_INVALID: 586 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_INVALID"); 587 break; 588 589 default: 590 printf("unknown buffer type %d\n", cookie->id_buftype); 591 panic("_isa_bus_dmamap_sync"); 592 } 593 } 594 595 /* 596 * Allocate memory safe for ISA DMA. 597 */ 598 int 599 _isa_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment, 600 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs, 601 int flags) 602 { 603 paddr_t high, avail_end = 0; 604 int bank; 605 606 for (bank = 0; bank < vm_nphysseg; bank++) { 607 if (avail_end < vm_physmem[bank].avail_end << PGSHIFT) 608 avail_end = vm_physmem[bank].avail_end << PGSHIFT; 609 } 610 611 if (avail_end > ISA_DMA_BOUNCE_THRESHOLD) 612 high = trunc_page(ISA_DMA_BOUNCE_THRESHOLD); 613 else 614 high = trunc_page(avail_end); 615 return (_bus_dmamem_alloc_range(t, size, alignment, boundary, 616 segs, nsegs, rsegs, flags, 0, high)); 617 } 618 619 /********************************************************************** 620 * ISA DMA utility functions 621 **********************************************************************/ 622 623 int 624 _isa_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, bus_size_t size, 625 int flags) 626 { 627 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie; 628 int error = 0; 629 630 cookie->id_bouncebuflen = round_page(size); 631 error = _isa_bus_dmamem_alloc(t, cookie->id_bouncebuflen, 632 PAGE_SIZE, map->_dm_boundary, cookie->id_bouncesegs, 633 map->_dm_segcnt, &cookie->id_nbouncesegs, flags); 634 if (error) 635 goto out; 636 error = _bus_dmamem_map(t, cookie->id_bouncesegs, 637 cookie->id_nbouncesegs, cookie->id_bouncebuflen, 638 (void **)&cookie->id_bouncebuf, flags); 639 640 out: 641 if (error) { 642 _bus_dmamem_free(t, cookie->id_bouncesegs, 643 cookie->id_nbouncesegs); 644 cookie->id_bouncebuflen = 0; 645 cookie->id_nbouncesegs = 0; 646 } else { 647 cookie->id_flags |= ID_HAS_BOUNCE; 648 STAT_INCR(isa_dma_stats_nbouncebufs); 649 } 650 651 return (error); 652 } 653 654 void 655 _isa_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map) 656 { 657 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie; 658 659 STAT_DECR(isa_dma_stats_nbouncebufs); 660 661 _bus_dmamem_unmap(t, cookie->id_bouncebuf, 662 cookie->id_bouncebuflen); 663 _bus_dmamem_free(t, cookie->id_bouncesegs, 664 cookie->id_nbouncesegs); 665 cookie->id_bouncebuflen = 0; 666 cookie->id_nbouncesegs = 0; 667 cookie->id_flags &= ~ID_HAS_BOUNCE; 668 } 669