1 /* $NetBSD: isadma_machdep.c,v 1.14 2022/01/22 15:10:32 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: isadma_machdep.c,v 1.14 2022/01/22 15:10:32 skrll Exp $");
35
36 #define ISA_DMA_STATS
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/syslog.h>
41 #include <sys/device.h>
42 #include <sys/kmem.h>
43 #include <sys/proc.h>
44 #include <sys/mbuf.h>
45
46 #define _POWERPC_BUS_DMA_PRIVATE
47 #include <sys/bus.h>
48
49 #include <machine/pio.h>
50
51 #include <dev/isa/isareg.h>
52 #include <dev/isa/isavar.h>
53
54 #include <uvm/uvm.h>
55
56 /*
57 * Cookie used by ISA dma. A pointer to one of these it stashed in
58 * the DMA map.
59 */
60 struct powerpc_isa_dma_cookie {
61 int id_flags; /* flags; see below */
62
63 /*
64 * Information about the original buffer used during
65 * DMA map syncs. Note that origbuflen is only used
66 * for ID_BUFTYPE_LINEAR.
67 */
68 void *id_origbuf; /* pointer to orig buffer if
69 bouncing */
70 bus_size_t id_origbuflen; /* ...and size */
71 int id_buftype; /* type of buffer */
72
73 void *id_bouncebuf; /* pointer to the bounce buffer */
74 bus_size_t id_bouncebuflen; /* ...and size */
75 int id_nbouncesegs; /* number of valid bounce segs */
76 bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer
77 physical memory segments */
78 };
79
80 /* id_flags */
81 #define ID_MIGHT_NEED_BOUNCE 0x01 /* map could need bounce buffers */
82 #define ID_HAS_BOUNCE 0x02 /* map currently has bounce buffers */
83 #define ID_IS_BOUNCING 0x04 /* map is bouncing current xfer */
84
85 /* id_buftype */
86 #define ID_BUFTYPE_INVALID 0
87 #define ID_BUFTYPE_LINEAR 1
88 #define ID_BUFTYPE_MBUF 2
89 #define ID_BUFTYPE_UIO 3
90 #define ID_BUFTYPE_RAW 4
91
92 static int _isa_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int,
93 bus_size_t, bus_size_t, int, bus_dmamap_t *);
94 static void _isa_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
95 static int _isa_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
96 bus_size_t, struct proc *, int);
97 static int _isa_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
98 struct mbuf *, int);
99 static int _isa_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
100 struct uio *, int);
101 static int _isa_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
102 bus_dma_segment_t *, int, bus_size_t, int);
103 static void _isa_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
104 static void _isa_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
105 bus_addr_t, bus_size_t, int);
106
107 static int _isa_bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
108 bus_size_t, bus_dma_segment_t *, int, int *, int);
109
110 static int _isa_dma_alloc_bouncebuf(bus_dma_tag_t, bus_dmamap_t,
111 bus_size_t, int);
112 static void _isa_dma_free_bouncebuf(bus_dma_tag_t, bus_dmamap_t);
113
114 /*
115 * Entry points for ISA DMA. These are mostly wrappers around
116 * the generic functions that understand how to deal with bounce
117 * buffers, if necessary.
118 */
119 struct powerpc_bus_dma_tag isa_bus_dma_tag = {
120 ISA_DMA_BOUNCE_THRESHOLD,
121 _isa_bus_dmamap_create,
122 _isa_bus_dmamap_destroy,
123 _isa_bus_dmamap_load,
124 _isa_bus_dmamap_load_mbuf,
125 _isa_bus_dmamap_load_uio,
126 _isa_bus_dmamap_load_raw,
127 _isa_bus_dmamap_unload,
128 _isa_bus_dmamap_sync,
129 _isa_bus_dmamem_alloc,
130 _bus_dmamem_free,
131 _bus_dmamem_map,
132 _bus_dmamem_unmap,
133 _bus_dmamem_mmap,
134 };
135
136 /**********************************************************************
137 * bus.h dma interface entry points
138 **********************************************************************/
139
140 #ifdef ISA_DMA_STATS
141 #define STAT_INCR(v) (v)++
142 #define STAT_DECR(v) do { \
143 if ((v) == 0) \
144 printf("%s:%d -- Already 0!\n", __FILE__, __LINE__); \
145 else \
146 (v)--; \
147 } while (0)
148 u_long isa_dma_stats_loads;
149 u_long isa_dma_stats_bounces;
150 u_long isa_dma_stats_nbouncebufs;
151 #else
152 #define STAT_INCR(v)
153 #define STAT_DECR(v)
154 #endif
155
156 /*
157 * Create an ISA DMA map.
158 */
159 int
_isa_bus_dmamap_create(bus_dma_tag_t t,bus_size_t size,int nsegments,bus_size_t maxsegsz,bus_size_t boundary,int flags,bus_dmamap_t * dmamp)160 _isa_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
161 bus_size_t maxsegsz, bus_size_t boundary, int flags,
162 bus_dmamap_t *dmamp)
163 {
164 struct powerpc_isa_dma_cookie *cookie;
165 bus_dmamap_t map;
166 int error, cookieflags, bank;
167 void *cookiestore;
168 size_t cookiesize;
169 paddr_t avail_end = 0;
170
171 for (bank = uvm_physseg_get_first();
172 uvm_physseg_valid_p(bank);
173 bank = uvm_physseg_get_next(bank)) {
174 if (avail_end < uvm_physseg_get_avail_end(bank) << PGSHIFT)
175 avail_end = uvm_physseg_get_avail_end(bank) << PGSHIFT;
176 }
177
178 /* Call common function to create the basic map. */
179 error = _bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
180 flags, dmamp);
181 if (error)
182 return (error);
183
184 map = *dmamp;
185 map->_dm_cookie = NULL;
186
187 cookiesize = sizeof(*cookie);
188
189 /*
190 * ISA only has 24-bits of address space. This means
191 * we can't DMA to pages over 16M. In order to DMA to
192 * arbitrary buffers, we use "bounce buffers" - pages
193 * in memory below the 16M boundary. On DMA reads,
194 * DMA happens to the bounce buffers, and is copied into
195 * the caller's buffer. On writes, data is copied into
196 * the bounce buffer, and the DMA happens from those
197 * pages. To software using the DMA mapping interface,
198 * this looks simply like a data cache.
199 *
200 * If we have more than 16M of RAM in the system, we may
201 * need bounce buffers. We check and remember that here.
202 *
203 * There are exceptions, however. VLB devices can do
204 * 32-bit DMA, and indicate that here.
205 *
206 * ...or, there is an opposite case. The most segments
207 * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
208 * the caller can't handle that many segments (e.g. the
209 * ISA DMA controller), we may have to bounce it as well.
210 */
211 if (avail_end <= t->_bounce_thresh ||
212 (flags & ISABUS_DMA_32BIT) != 0) {
213 /* Bouncing not necessary due to memory size. */
214 map->_dm_bounce_thresh = 0;
215 }
216 cookieflags = 0;
217 if (map->_dm_bounce_thresh != 0 ||
218 ((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt) {
219 cookieflags |= ID_MIGHT_NEED_BOUNCE;
220 cookiesize += (sizeof(bus_dma_segment_t) * map->_dm_segcnt);
221 }
222
223 /*
224 * Allocate our cookie.
225 */
226 if ((cookiestore = kmem_intr_alloc(cookiesize,
227 (flags & BUS_DMA_NOWAIT) ? KM_NOSLEEP : KM_SLEEP)) == NULL) {
228 error = ENOMEM;
229 goto out;
230 }
231 memset(cookiestore, 0, cookiesize);
232 cookie = (struct powerpc_isa_dma_cookie *)cookiestore;
233 cookie->id_flags = cookieflags;
234 map->_dm_cookie = cookie;
235
236 if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
237 /*
238 * Allocate the bounce pages now if the caller
239 * wishes us to do so.
240 */
241 if ((flags & BUS_DMA_ALLOCNOW) == 0)
242 goto out;
243
244 error = _isa_dma_alloc_bouncebuf(t, map, size, flags);
245 }
246
247 out:
248 if (error) {
249 if (map->_dm_cookie != NULL)
250 kmem_intr_free(cookiestore, cookiesize);
251 _bus_dmamap_destroy(t, map);
252 }
253 return (error);
254 }
255
256 /*
257 * Destroy an ISA DMA map.
258 */
259 void
_isa_bus_dmamap_destroy(bus_dma_tag_t t,bus_dmamap_t map)260 _isa_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
261 {
262 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
263
264 /*
265 * Free any bounce pages this map might hold.
266 */
267 if (cookie->id_flags & ID_HAS_BOUNCE)
268 _isa_dma_free_bouncebuf(t, map);
269
270 size_t cookiesize = sizeof(*cookie);
271 if (cookie->id_flags & ID_MIGHT_NEED_BOUNCE)
272 cookiesize += (sizeof(bus_dma_segment_t) * map->_dm_segcnt);
273
274 kmem_intr_free(cookie, cookiesize);
275 _bus_dmamap_destroy(t, map);
276 }
277
278 /*
279 * Load an ISA DMA map with a linear buffer.
280 */
281 int
_isa_bus_dmamap_load(bus_dma_tag_t t,bus_dmamap_t map,void * buf,bus_size_t buflen,struct proc * p,int flags)282 _isa_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
283 bus_size_t buflen, struct proc *p, int flags)
284 {
285 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
286 int error;
287
288 STAT_INCR(isa_dma_stats_loads);
289
290 /*
291 * Make sure that on error condition we return "no valid mappings."
292 */
293 map->dm_mapsize = 0;
294 map->dm_nsegs = 0;
295
296 /*
297 * Try to load the map the normal way. If this errors out,
298 * and we can bounce, we will.
299 */
300 error = _bus_dmamap_load(t, map, buf, buflen, p, flags);
301 if (error == 0 || (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0)
302 return (error);
303
304 /*
305 * First attempt failed; bounce it.
306 */
307
308 STAT_INCR(isa_dma_stats_bounces);
309
310 /*
311 * Allocate bounce pages, if necessary.
312 */
313 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
314 error = _isa_dma_alloc_bouncebuf(t, map, buflen, flags);
315 if (error)
316 return (error);
317 }
318
319 /*
320 * Cache a pointer to the caller's buffer and load the DMA map
321 * with the bounce buffer.
322 */
323 cookie->id_origbuf = buf;
324 cookie->id_origbuflen = buflen;
325 cookie->id_buftype = ID_BUFTYPE_LINEAR;
326 error = _bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
327 p, flags);
328 if (error) {
329 /*
330 * Free the bounce pages, unless our resources
331 * are reserved for our exclusive use.
332 */
333 if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
334 _isa_dma_free_bouncebuf(t, map);
335 return (error);
336 }
337
338 /* ...so _isa_bus_dmamap_sync() knows we're bouncing */
339 cookie->id_flags |= ID_IS_BOUNCING;
340 return (0);
341 }
342
343 /*
344 * Like _isa_bus_dmamap_load(), but for mbufs.
345 */
346 int
_isa_bus_dmamap_load_mbuf(bus_dma_tag_t t,bus_dmamap_t map,struct mbuf * m0,int flags)347 _isa_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
348 int flags)
349 {
350 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
351 int error;
352
353 /*
354 * Make sure that on error condition we return "no valid mappings."
355 */
356 map->dm_mapsize = 0;
357 map->dm_nsegs = 0;
358
359 #ifdef DIAGNOSTIC
360 if ((m0->m_flags & M_PKTHDR) == 0)
361 panic("_isa_bus_dmamap_load_mbuf: no packet header");
362 #endif
363
364 if (m0->m_pkthdr.len > map->_dm_size)
365 return (EINVAL);
366
367 /*
368 * Try to load the map the normal way. If this errors out,
369 * and we can bounce, we will.
370 */
371 error = _bus_dmamap_load_mbuf(t, map, m0, flags);
372 if (error == 0 || (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0)
373 return (error);
374
375 /*
376 * First attempt failed; bounce it.
377 */
378
379 STAT_INCR(isa_dma_stats_bounces);
380
381 /*
382 * Allocate bounce pages, if necessary.
383 */
384 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
385 error = _isa_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
386 flags);
387 if (error)
388 return (error);
389 }
390
391 /*
392 * Cache a pointer to the caller's buffer and load the DMA map
393 * with the bounce buffer.
394 */
395 cookie->id_origbuf = m0;
396 cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
397 cookie->id_buftype = ID_BUFTYPE_MBUF;
398 error = _bus_dmamap_load(t, map, cookie->id_bouncebuf,
399 m0->m_pkthdr.len, NULL, flags);
400 if (error) {
401 /*
402 * Free the bounce pages, unless our resources
403 * are reserved for our exclusive use.
404 */
405 if ((map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
406 _isa_dma_free_bouncebuf(t, map);
407 return (error);
408 }
409
410 /* ...so _isa_bus_dmamap_sync() knows we're bouncing */
411 cookie->id_flags |= ID_IS_BOUNCING;
412 return (0);
413 }
414
415 /*
416 * Like _isa_bus_dmamap_load(), but for uios.
417 */
418 int
_isa_bus_dmamap_load_uio(bus_dma_tag_t t,bus_dmamap_t map,struct uio * uio,int flags)419 _isa_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map,
420 struct uio *uio, int flags)
421 {
422
423 panic("_isa_bus_dmamap_load_uio: not implemented");
424 }
425
426 /*
427 * Like _isa_bus_dmamap_load(), but for raw memory allocated with
428 * bus_dmamem_alloc().
429 */
430 int
_isa_bus_dmamap_load_raw(bus_dma_tag_t t,bus_dmamap_t map,bus_dma_segment_t * segs,int nsegs,bus_size_t size,int flags)431 _isa_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
432 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
433 {
434
435 panic("_isa_bus_dmamap_load_raw: not implemented");
436 }
437
438 /*
439 * Unload an ISA DMA map.
440 */
441 void
_isa_bus_dmamap_unload(bus_dma_tag_t t,bus_dmamap_t map)442 _isa_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
443 {
444 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
445
446 /*
447 * If we have bounce pages, free them, unless they're
448 * reserved for our exclusive use.
449 */
450 if ((cookie->id_flags & ID_HAS_BOUNCE) &&
451 (map->_dm_flags & BUS_DMA_ALLOCNOW) == 0)
452 _isa_dma_free_bouncebuf(t, map);
453
454 cookie->id_flags &= ~ID_IS_BOUNCING;
455 cookie->id_buftype = ID_BUFTYPE_INVALID;
456
457 /*
458 * Do the generic bits of the unload.
459 */
460 _bus_dmamap_unload(t, map);
461 }
462
463 /*
464 * Synchronize an ISA DMA map.
465 */
466 void
_isa_bus_dmamap_sync(bus_dma_tag_t t,bus_dmamap_t map,bus_addr_t offset,bus_size_t len,int ops)467 _isa_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
468 bus_size_t len, int ops)
469 {
470 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
471
472 /*
473 * Mixing PRE and POST operations is not allowed.
474 */
475 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
476 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
477 panic("_isa_bus_dmamap_sync: mix PRE and POST");
478
479 #ifdef DIAGNOSTIC
480 if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
481 if (offset >= map->dm_mapsize)
482 panic("_isa_bus_dmamap_sync: bad offset");
483 if (len == 0 || (offset + len) > map->dm_mapsize)
484 panic("_isa_bus_dmamap_sync: bad length");
485 }
486 #endif
487
488 /*
489 * If we're not bouncing, just return; nothing to do.
490 */
491 if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
492 return;
493
494 switch (cookie->id_buftype) {
495 case ID_BUFTYPE_LINEAR:
496 /*
497 * Nothing to do for pre-read.
498 */
499
500 if (ops & BUS_DMASYNC_PREWRITE) {
501 /*
502 * Copy the caller's buffer to the bounce buffer.
503 */
504 memcpy((char *)cookie->id_bouncebuf + offset,
505 (char *)cookie->id_origbuf + offset, len);
506 }
507
508 if (ops & BUS_DMASYNC_POSTREAD) {
509 /*
510 * Copy the bounce buffer to the caller's buffer.
511 */
512 memcpy((char *)cookie->id_origbuf + offset,
513 (char *)cookie->id_bouncebuf + offset, len);
514 }
515
516 /*
517 * Nothing to do for post-write.
518 */
519 break;
520
521 case ID_BUFTYPE_MBUF:
522 {
523 struct mbuf *m, *m0 = cookie->id_origbuf;
524 bus_size_t minlen, moff;
525
526 /*
527 * Nothing to do for pre-read.
528 */
529
530 if (ops & BUS_DMASYNC_PREWRITE) {
531 /*
532 * Copy the caller's buffer to the bounce buffer.
533 */
534 m_copydata(m0, offset, len,
535 (char *)cookie->id_bouncebuf + offset);
536 }
537
538 if (ops & BUS_DMASYNC_POSTREAD) {
539 /*
540 * Copy the bounce buffer to the caller's buffer.
541 */
542 for (moff = offset, m = m0; m != NULL && len != 0;
543 m = m->m_next) {
544 /* Find the beginning mbuf. */
545 if (moff >= m->m_len) {
546 moff -= m->m_len;
547 continue;
548 }
549
550 /*
551 * Now at the first mbuf to sync; nail
552 * each one until we have exhausted the
553 * length.
554 */
555 minlen = len < m->m_len - moff ?
556 len : m->m_len - moff;
557
558 memcpy(mtod(m, char *) + moff,
559 (char *)cookie->id_bouncebuf + offset,
560 minlen);
561
562 moff = 0;
563 len -= minlen;
564 offset += minlen;
565 }
566 }
567
568 /*
569 * Nothing to do for post-write.
570 */
571 break;
572 }
573
574 case ID_BUFTYPE_UIO:
575 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_UIO");
576 break;
577
578 case ID_BUFTYPE_RAW:
579 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_RAW");
580 break;
581
582 case ID_BUFTYPE_INVALID:
583 panic("_isa_bus_dmamap_sync: ID_BUFTYPE_INVALID");
584 break;
585
586 default:
587 printf("unknown buffer type %d\n", cookie->id_buftype);
588 panic("_isa_bus_dmamap_sync");
589 }
590 }
591
592 /*
593 * Allocate memory safe for ISA DMA.
594 */
595 int
_isa_bus_dmamem_alloc(bus_dma_tag_t t,bus_size_t size,bus_size_t alignment,bus_size_t boundary,bus_dma_segment_t * segs,int nsegs,int * rsegs,int flags)596 _isa_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
597 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
598 int flags)
599 {
600 paddr_t high, avail_end = 0;
601 int bank;
602
603 for (bank = uvm_physseg_get_first();
604 uvm_physseg_valid_p(bank);
605 bank = uvm_physseg_get_next(bank)) {
606 if (avail_end < uvm_physseg_get_avail_end(bank) << PGSHIFT)
607 avail_end = uvm_physseg_get_avail_end(bank) << PGSHIFT;
608 }
609
610 if (avail_end > ISA_DMA_BOUNCE_THRESHOLD)
611 high = ISA_DMA_BOUNCE_THRESHOLD - 1;
612 else
613 high = avail_end - 1;
614 return (_bus_dmamem_alloc_range(t, size, alignment, boundary,
615 segs, nsegs, rsegs, flags, 0, high));
616 }
617
618 /**********************************************************************
619 * ISA DMA utility functions
620 **********************************************************************/
621
622 int
_isa_dma_alloc_bouncebuf(bus_dma_tag_t t,bus_dmamap_t map,bus_size_t size,int flags)623 _isa_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, bus_size_t size,
624 int flags)
625 {
626 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
627 int error = 0;
628
629 cookie->id_bouncebuflen = round_page(size);
630 error = _isa_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
631 PAGE_SIZE, map->_dm_boundary, cookie->id_bouncesegs,
632 map->_dm_segcnt, &cookie->id_nbouncesegs, flags);
633 if (error)
634 goto out;
635 error = _bus_dmamem_map(t, cookie->id_bouncesegs,
636 cookie->id_nbouncesegs, cookie->id_bouncebuflen,
637 (void **)&cookie->id_bouncebuf, flags);
638
639 out:
640 if (error) {
641 _bus_dmamem_free(t, cookie->id_bouncesegs,
642 cookie->id_nbouncesegs);
643 cookie->id_bouncebuflen = 0;
644 cookie->id_nbouncesegs = 0;
645 } else {
646 cookie->id_flags |= ID_HAS_BOUNCE;
647 STAT_INCR(isa_dma_stats_nbouncebufs);
648 }
649
650 return (error);
651 }
652
653 void
_isa_dma_free_bouncebuf(bus_dma_tag_t t,bus_dmamap_t map)654 _isa_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map)
655 {
656 struct powerpc_isa_dma_cookie *cookie = map->_dm_cookie;
657
658 STAT_DECR(isa_dma_stats_nbouncebufs);
659
660 _bus_dmamem_unmap(t, cookie->id_bouncebuf,
661 cookie->id_bouncebuflen);
662 _bus_dmamem_free(t, cookie->id_bouncesegs,
663 cookie->id_nbouncesegs);
664 cookie->id_bouncebuflen = 0;
665 cookie->id_nbouncesegs = 0;
666 cookie->id_flags &= ~ID_HAS_BOUNCE;
667 }
668