1 /* $NetBSD: bus_defs.h,v 1.3 2019/09/23 16:17:57 skrll Exp $ */ 2 /* $OpenBSD: bus.h,v 1.1 1997/10/13 10:53:42 pefo Exp $ */ 3 4 /*- 5 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 36 * Copyright (c) 1996 Jason R. Thorpe. All rights reserved. 37 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by Christopher G. Demetriou 50 * for the NetBSD Project. 51 * 4. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 58 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 59 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 63 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 /* 67 * Copyright (c) 1997 Per Fogelstrom. All rights reserved. 68 * Copyright (c) 1996 Niklas Hallqvist. All rights reserved. 69 * 70 * Redistribution and use in source and binary forms, with or without 71 * modification, are permitted provided that the following conditions 72 * are met: 73 * 1. Redistributions of source code must retain the above copyright 74 * notice, this list of conditions and the following disclaimer. 75 * 2. Redistributions in binary form must reproduce the above copyright 76 * notice, this list of conditions and the following disclaimer in the 77 * documentation and/or other materials provided with the distribution. 78 * 3. All advertising materials mentioning features or use of this software 79 * must display the following acknowledgement: 80 * This product includes software developed by Christopher G. Demetriou 81 * for the NetBSD Project. 82 * 4. The name of the author may not be used to endorse or promote products 83 * derived from this software without specific prior written permission 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 86 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 87 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 88 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 89 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 90 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 91 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 92 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 93 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 94 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 95 */ 96 97 #ifndef _POWERPC_BUS_DEFS_H_ 98 #define _POWERPC_BUS_DEFS_H_ 99 100 #if defined(_KERNEL_OPT) && !defined(BUS_DMA_DONTCACHE) 101 #include "opt_ppcarch.h" 102 #if defined(PPC_IBM4XX) || defined(PPC_BOOKE) 103 #define BUS_DMA_DONTCACHE (BUS_DMA_COHERENT|BUS_DMA_NOCACHE) 104 #endif /* PPC_IBM4XX */ 105 #endif /* _KERNEL_OPT && !BUS_DMA_DONTCACHE */ 106 107 /* 108 * Bus access types. 109 */ 110 typedef uintptr_t bus_addr_t; 111 typedef uintptr_t bus_size_t; 112 113 #define PRIxBUSADDR PRIxPTR 114 #define PRIxBUSSIZE PRIxPTR 115 #define PRIuBUSSIZE PRIuPTR 116 117 #ifndef __HAVE_LOCAL_BUS_SPACE 118 typedef uintptr_t bus_space_handle_t; 119 120 #define PRIxBSH PRIxPTR 121 122 typedef const struct powerpc_bus_space *bus_space_tag_t; 123 124 struct extent; 125 126 struct powerpc_bus_space_scalar { 127 uint8_t (*pbss_read_1)(bus_space_tag_t, bus_space_handle_t, 128 bus_size_t); 129 uint16_t (*pbss_read_2)(bus_space_tag_t, bus_space_handle_t, 130 bus_size_t); 131 uint32_t (*pbss_read_4)(bus_space_tag_t, bus_space_handle_t, 132 bus_size_t); 133 uint64_t (*pbss_read_8)(bus_space_tag_t, bus_space_handle_t, 134 bus_size_t); 135 136 void (*pbss_write_1)(bus_space_tag_t, bus_space_handle_t, bus_size_t, 137 uint8_t); 138 void (*pbss_write_2)(bus_space_tag_t, bus_space_handle_t, bus_size_t, 139 uint16_t); 140 void (*pbss_write_4)(bus_space_tag_t, bus_space_handle_t, bus_size_t, 141 uint32_t); 142 void (*pbss_write_8)(bus_space_tag_t, bus_space_handle_t, bus_size_t, 143 uint64_t); 144 }; 145 146 struct powerpc_bus_space_group { 147 void (*pbsg_read_1)(bus_space_tag_t, bus_space_handle_t, 148 bus_size_t, uint8_t *, size_t); 149 void (*pbsg_read_2)(bus_space_tag_t, bus_space_handle_t, 150 bus_size_t, uint16_t *, size_t); 151 void (*pbsg_read_4)(bus_space_tag_t, bus_space_handle_t, 152 bus_size_t, uint32_t *, size_t); 153 void (*pbsg_read_8)(bus_space_tag_t, bus_space_handle_t, 154 bus_size_t, uint64_t *, size_t); 155 156 void (*pbsg_write_1)(bus_space_tag_t, bus_space_handle_t, 157 bus_size_t, const uint8_t *, size_t); 158 void (*pbsg_write_2)(bus_space_tag_t, bus_space_handle_t, 159 bus_size_t, const uint16_t *, size_t); 160 void (*pbsg_write_4)(bus_space_tag_t, bus_space_handle_t, 161 bus_size_t, const uint32_t *, size_t); 162 void (*pbsg_write_8)(bus_space_tag_t, bus_space_handle_t, 163 bus_size_t, const uint64_t *, size_t); 164 }; 165 166 struct powerpc_bus_space_set { 167 void (*pbss_set_1)(bus_space_tag_t, bus_space_handle_t, 168 bus_size_t, uint8_t, size_t); 169 void (*pbss_set_2)(bus_space_tag_t, bus_space_handle_t, 170 bus_size_t, uint16_t, size_t); 171 void (*pbss_set_4)(bus_space_tag_t, bus_space_handle_t, 172 bus_size_t, uint32_t, size_t); 173 void (*pbss_set_8)(bus_space_tag_t, bus_space_handle_t, 174 bus_size_t, uint64_t, size_t); 175 }; 176 177 struct powerpc_bus_space_copy { 178 void (*pbsc_copy_1)(bus_space_tag_t, bus_space_handle_t, 179 bus_size_t, bus_space_handle_t, bus_size_t, size_t); 180 void (*pbsc_copy_2)(bus_space_tag_t, bus_space_handle_t, 181 bus_size_t, bus_space_handle_t, bus_size_t, size_t); 182 void (*pbsc_copy_4)(bus_space_tag_t, bus_space_handle_t, 183 bus_size_t, bus_space_handle_t, bus_size_t, size_t); 184 void (*pbsc_copy_8)(bus_space_tag_t, bus_space_handle_t, 185 bus_size_t, bus_space_handle_t, bus_size_t, size_t); 186 }; 187 188 struct powerpc_bus_space { 189 int pbs_flags; 190 #define _BUS_SPACE_BIG_ENDIAN 0x00000100 191 #define _BUS_SPACE_LITTLE_ENDIAN 0x00000000 192 #define _BUS_SPACE_IO_TYPE 0x00000200 193 #define _BUS_SPACE_MEM_TYPE 0x00000000 194 #define _BUS_SPACE_STRIDE_MASK 0x0000001f 195 bus_addr_t pbs_offset; /* offset to real start */ 196 bus_addr_t pbs_base; /* extent base */ 197 bus_addr_t pbs_limit; /* extent limit */ 198 struct extent *pbs_extent; 199 200 paddr_t (*pbs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int); 201 int (*pbs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int, 202 bus_space_handle_t *); 203 void (*pbs_unmap)(bus_space_tag_t, bus_space_handle_t, bus_size_t); 204 int (*pbs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t, 205 bus_size_t align, bus_size_t, int, bus_addr_t *, 206 bus_space_handle_t *); 207 void (*pbs_free)(bus_space_tag_t, bus_space_handle_t, bus_size_t); 208 int (*pbs_subregion)(bus_space_tag_t, bus_space_handle_t, bus_size_t, 209 bus_size_t, bus_space_handle_t *); 210 211 struct powerpc_bus_space_scalar pbs_scalar; 212 struct powerpc_bus_space_scalar pbs_scalar_stream; 213 const struct powerpc_bus_space_group *pbs_multi; 214 const struct powerpc_bus_space_group *pbs_multi_stream; 215 const struct powerpc_bus_space_group *pbs_region; 216 const struct powerpc_bus_space_group *pbs_region_stream; 217 const struct powerpc_bus_space_set *pbs_set; 218 const struct powerpc_bus_space_set *pbs_set_stream; 219 const struct powerpc_bus_space_copy *pbs_copy; 220 }; 221 222 #define _BUS_SPACE_STRIDE(t, o) \ 223 ((o) << ((t)->pbs_flags & _BUS_SPACE_STRIDE_MASK)) 224 #define _BUS_SPACE_UNSTRIDE(t, o) \ 225 ((o) >> ((t)->pbs_flags & _BUS_SPACE_STRIDE_MASK)) 226 227 #define BUS_SPACE_MAP_CACHEABLE 0x01 228 #define BUS_SPACE_MAP_LINEAR 0x02 229 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 230 231 int bus_space_init(struct powerpc_bus_space *, const char *, void *, size_t); 232 void bus_space_mallocok(void); 233 234 /* 235 * Access methods for bus resources 236 */ 237 238 #define __BUS_SPACE_HAS_STREAM_METHODS 239 240 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 241 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 242 243 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 244 245 #endif /* !__HAVE_LOCAL_BUS_SPACE */ 246 247 /* 248 * Bus DMA methods. 249 */ 250 251 /* 252 * Flags used in various bus DMA methods. 253 */ 254 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 255 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 256 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 257 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 258 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 259 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 260 #define BUS_DMA_BUS2 0x020 261 #define BUS_DMA_BUS3 0x040 262 #define BUS_DMA_BUS4 0x080 263 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 264 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 265 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 266 267 #ifndef BUS_DMA_DONTCACHE 268 #define BUS_DMA_DONTCACHE BUS_DMA_NOCACHE 269 #endif 270 271 /* Forwards needed by prototypes below. */ 272 struct proc; 273 struct mbuf; 274 struct uio; 275 276 /* 277 * Operations performed by bus_dmamap_sync(). 278 */ 279 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 280 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 281 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 282 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 283 284 typedef struct powerpc_bus_dma_tag *bus_dma_tag_t; 285 typedef struct powerpc_bus_dmamap *bus_dmamap_t; 286 287 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 288 289 /* 290 * bus_dma_segment_t 291 * 292 * Describes a single contiguous DMA transaction. Values 293 * are suitable for programming into DMA registers. 294 */ 295 struct powerpc_bus_dma_segment { 296 bus_addr_t ds_addr; /* DMA address */ 297 bus_size_t ds_len; /* length of transfer */ 298 }; 299 typedef struct powerpc_bus_dma_segment bus_dma_segment_t; 300 301 /* 302 * bus_dma_tag_t 303 * 304 * A machine-dependent opaque type describing the implementation of 305 * DMA for a given bus. 306 */ 307 308 struct powerpc_bus_dma_tag { 309 /* 310 * The `bounce threshold' is checked while we are loading 311 * the DMA map. If the physical address of the segment 312 * exceeds the threshold, an error will be returned. The 313 * caller can then take whatever action is necessary to 314 * bounce the transfer. If this value is 0, it will be 315 * ignored. 316 */ 317 bus_addr_t _bounce_thresh; 318 319 /* 320 * DMA mapping methods. 321 */ 322 int (*_dmamap_create) (bus_dma_tag_t, bus_size_t, int, 323 bus_size_t, bus_size_t, int, bus_dmamap_t *); 324 void (*_dmamap_destroy) (bus_dma_tag_t, bus_dmamap_t); 325 int (*_dmamap_load) (bus_dma_tag_t, bus_dmamap_t, void *, 326 bus_size_t, struct proc *, int); 327 int (*_dmamap_load_mbuf) (bus_dma_tag_t, bus_dmamap_t, 328 struct mbuf *, int); 329 int (*_dmamap_load_uio) (bus_dma_tag_t, bus_dmamap_t, 330 struct uio *, int); 331 int (*_dmamap_load_raw) (bus_dma_tag_t, bus_dmamap_t, 332 bus_dma_segment_t *, int, bus_size_t, int); 333 void (*_dmamap_unload) (bus_dma_tag_t, bus_dmamap_t); 334 void (*_dmamap_sync) (bus_dma_tag_t, bus_dmamap_t, 335 bus_addr_t, bus_size_t, int); 336 337 /* 338 * DMA memory utility functions. 339 */ 340 int (*_dmamem_alloc) (bus_dma_tag_t, bus_size_t, bus_size_t, 341 bus_size_t, bus_dma_segment_t *, int, int *, int); 342 void (*_dmamem_free) (bus_dma_tag_t, 343 bus_dma_segment_t *, int); 344 int (*_dmamem_map) (bus_dma_tag_t, bus_dma_segment_t *, 345 int, size_t, void **, int); 346 void (*_dmamem_unmap) (bus_dma_tag_t, void *, size_t); 347 paddr_t (*_dmamem_mmap) (bus_dma_tag_t, bus_dma_segment_t *, 348 int, off_t, int, int); 349 350 #ifndef PHYS_TO_BUS_MEM 351 bus_addr_t (*_dma_phys_to_bus_mem)(bus_dma_tag_t, bus_addr_t); 352 #define PHYS_TO_BUS_MEM(t, addr) (*(t)->_dma_phys_to_bus_mem)((t), (addr)) 353 #endif 354 #ifndef BUS_MEM_TO_PHYS 355 bus_addr_t (*_dma_bus_mem_to_phys)(bus_dma_tag_t, bus_addr_t); 356 #define BUS_MEM_TO_PHYS(t, addr) (*(t)->_dma_bus_mem_to_phys)((t), (addr)) 357 #endif 358 }; 359 360 /* 361 * bus_dmamap_t 362 * 363 * Describes a DMA mapping. 364 */ 365 struct powerpc_bus_dmamap { 366 /* 367 * PRIVATE MEMBERS: not for use my machine-independent code. 368 */ 369 bus_size_t _dm_size; /* largest DMA transfer mappable */ 370 int _dm_segcnt; /* number of segs this map can map */ 371 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 372 bus_size_t _dm_boundary; /* don't cross this */ 373 bus_addr_t _dm_bounce_thresh; /* bounce threshold; see tag */ 374 int _dm_flags; /* misc. flags */ 375 376 void *_dm_cookie; /* cookie for bus-specific functions */ 377 378 /* 379 * PUBLIC MEMBERS: these are used by machine-independent code. 380 */ 381 bus_size_t dm_maxsegsz; /* largest possible segment */ 382 bus_size_t dm_mapsize; /* size of the mapping */ 383 int dm_nsegs; /* # valid segments in mapping */ 384 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 385 }; 386 387 #endif /* _POWERPC_BUS_DEFS_H_ */ 388