xref: /netbsd-src/sys/arch/powerpc/booke/dev/pq3ehci.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: pq3ehci.c,v 1.8 2016/04/23 10:15:30 skrll Exp $	*/
2 /*-
3  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to The NetBSD Foundation
7  * by Matt Thomas of 3am Software Foundry.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: pq3ehci.c,v 1.8 2016/04/23 10:15:30 skrll Exp $");
33 
34 #include "opt_usb.h"
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <sys/kernel.h>
40 #include <sys/proc.h>
41 #include <sys/queue.h>
42 
43 #include <sys/bus.h>
44 
45 #include <powerpc/booke/cpuvar.h>
46 #include <powerpc/booke/e500var.h>
47 #include <powerpc/booke/e500reg.h>
48 
49 #include <dev/usb/usb.h>
50 #include <dev/usb/usbdi.h>
51 #include <dev/usb/usbdivar.h>
52 #include <dev/usb/usb_mem.h>
53 
54 #include <dev/usb/ehcireg.h>
55 #include <dev/usb/ehcivar.h>
56 
57 /*
58  * This is relative to the start of the unreserved registers in USB contoller
59  * block and not the full USB block which would be 0x1a8.
60  */
61 #define	PQ3_USBMODE		0xa8			/* USB mode */
62 #define	 USBMODE_CM		__BITS(0,1)		/* Controller Mode */
63 #define	 USBMODE_CM_IDLE	__SHIFTIN(0,USBMODE_CM)	/* Idle (both) */
64 #define	 USBMODE_CM_DEVICE	__SHIFTIN(2,USBMODE_CM)	/* Device Controller */
65 #define	 USBMODE_CM_HOST	__SHIFTIN(3,USBMODE_CM)	/* Host Controller */
66 
67 #ifdef EHCI_DEBUG
68 #define DPRINTF(x)	if (ehcidebug) printf x
69 extern int ehcidebug;
70 #else
71 #define DPRINTF(x)
72 #endif
73 
74 static int pq3ehci_match(device_t, cfdata_t, void *);
75 static void pq3ehci_attach(device_t, device_t, void *);
76 
77 struct pq3ehci_softc {
78 	ehci_softc_t		sc;
79 	void 			*sc_ih;		/* interrupt vectoring */
80 };
81 
82 static void pq3ehci_init(struct ehci_softc *);
83 
84 CFATTACH_DECL_NEW(pq3ehci, sizeof(struct pq3ehci_softc),
85     pq3ehci_match, pq3ehci_attach, NULL, NULL);
86 
87 static int
88 pq3ehci_match(device_t parent, cfdata_t cf, void *aux)
89 {
90 
91         if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux))
92                 return 0;
93 
94         return 1;
95 }
96 
97 static void
98 pq3ehci_attach(device_t parent, device_t self, void *aux)
99 {
100 	struct cpunode_softc * const psc = device_private(parent);
101 	struct pq3ehci_softc * const sc = device_private(self);
102 	struct cpunode_attach_args * const cna = aux;
103 	struct cpunode_locators * const cnl = &cna->cna_locs;
104 	int error;
105 
106 	psc->sc_children |= cna->cna_childmask;
107 	sc->sc.iot = cna->cna_le_memt;	/* EHCI registers are little endian */
108 	sc->sc.sc_dev = self;
109 	sc->sc.sc_bus.ub_dmatag = cna->cna_dmat;
110 	sc->sc.sc_bus.ub_hcpriv = sc;
111 	sc->sc.sc_bus.ub_revision = USBREV_2_0;
112 	sc->sc.sc_ncomp = 0;
113 	sc->sc.sc_flags |= EHCIF_ETTF;
114 	sc->sc.sc_vendor_init = pq3ehci_init;
115 
116 	aprint_naive(": USB controller\n");
117 	aprint_normal(": USB controller\n");
118 
119 	error = bus_space_map(sc->sc.iot, cnl->cnl_addr, cnl->cnl_size, 0,
120 	    &sc->sc.ioh);
121 	if (error) {
122 		aprint_error_dev(self,
123 		    "can't map registers for %s#%u: %d\n",
124 		    cnl->cnl_name, cnl->cnl_instance, error);
125 		return;
126 	}
127 	sc->sc.sc_size = cnl->cnl_size;
128 
129 	/*
130 	 * We need to tell the USB interface to snoop all off RAM starting
131 	 * at 0.  Since it can do it by powers of 2, get the highest RAM
132 	 * address and roughly round it to the next power of 2 and find
133 	 * the number of leading zero bits.
134 	 */
135 	cpu_write_4(cnl->cnl_addr + USB_SNOOP1,
136 	    SNOOP_2GB - __builtin_clz(curcpu()->ci_softc->cpu_highmem * 2 - 1));
137 	cpu_write_4(cnl->cnl_addr + USB_CONTROL, USB_EN);
138 
139 	sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_USB, IST_ONCHIP,
140 	    ehci_intr, sc);
141 	if (sc->sc_ih == NULL) {
142 		aprint_error_dev(self, "failed to establish interrupt %d\n",
143 		     cnl->cnl_intrs[0]);
144 		goto fail;
145 	}
146 	aprint_normal_dev(self, "interrupting on irq %d\n",
147 	     cnl->cnl_intrs[0]);
148 
149 	/* offs is needed for EOWRITEx */
150 	sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
151 
152 	/* Disable interrupts, so we don't get any spurious ones. */
153 	DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs));
154 	EOWRITE4(&sc->sc, EHCI_USBINTR, 0);
155 
156 	error = ehci_init(&sc->sc);
157 	if (error) {
158 		aprint_error_dev(self, "init failed, error=%d\n", error);
159 		goto fail;
160 	}
161 
162 	/* Attach usb device. */
163 	sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
164 	return;
165 
166 fail:
167 	if (sc->sc_ih) {
168 		intr_disestablish(sc->sc_ih);
169 		sc->sc_ih = NULL;
170 	}
171 	if (sc->sc.sc_size) {
172 		bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
173 		sc->sc.sc_size = 0;
174 	}
175 	return;
176 }
177 
178 static void
179 pq3ehci_init(struct ehci_softc *hsc)
180 {
181 	uint32_t old = bus_space_read_4(hsc->iot, hsc->ioh, PQ3_USBMODE);
182 	uint32_t reg = old;
183 
184 	reg &= ~USBMODE_CM;
185 	reg |= USBMODE_CM_HOST;
186 	if (reg != old)
187 		bus_space_write_4(hsc->iot, hsc->ioh, PQ3_USBMODE, reg);
188 }
189