1 /* $NetBSD: pq3ehci.c,v 1.12 2021/08/07 16:19:02 thorpej Exp $ */
2 /*-
3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas of 3am Software Foundry.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: pq3ehci.c,v 1.12 2021/08/07 16:19:02 thorpej Exp $");
33
34 #ifdef _KERNEL_OPT
35 #include "opt_usb.h"
36 #endif
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41 #include <sys/kernel.h>
42 #include <sys/proc.h>
43 #include <sys/queue.h>
44
45 #include <sys/bus.h>
46
47 #include <powerpc/booke/cpuvar.h>
48 #include <powerpc/booke/e500var.h>
49 #include <powerpc/booke/e500reg.h>
50
51 #include <dev/usb/usb.h>
52 #include <dev/usb/usbdi.h>
53 #include <dev/usb/usbdivar.h>
54 #include <dev/usb/usb_mem.h>
55
56 #include <dev/usb/ehcireg.h>
57 #include <dev/usb/ehcivar.h>
58
59 /*
60 * This is relative to the start of the unreserved registers in USB controller
61 * block and not the full USB block which would be 0x1a8.
62 */
63 #define PQ3_USBMODE 0xa8 /* USB mode */
64 #define USBMODE_CM __BITS(0,1) /* Controller Mode */
65 #define USBMODE_CM_IDLE __SHIFTIN(0,USBMODE_CM) /* Idle (both) */
66 #define USBMODE_CM_DEVICE __SHIFTIN(2,USBMODE_CM) /* Device Controller */
67 #define USBMODE_CM_HOST __SHIFTIN(3,USBMODE_CM) /* Host Controller */
68
69 #ifdef EHCI_DEBUG
70 #define DPRINTF(x) if (ehcidebug) printf x
71 extern int ehcidebug;
72 #else
73 #define DPRINTF(x)
74 #endif
75
76 static int pq3ehci_match(device_t, cfdata_t, void *);
77 static void pq3ehci_attach(device_t, device_t, void *);
78
79 struct pq3ehci_softc {
80 ehci_softc_t sc;
81 void *sc_ih; /* interrupt vectoring */
82 };
83
84 static void pq3ehci_init(struct ehci_softc *);
85
86 CFATTACH_DECL_NEW(pq3ehci, sizeof(struct pq3ehci_softc),
87 pq3ehci_match, pq3ehci_attach, NULL, NULL);
88
89 static int
pq3ehci_match(device_t parent,cfdata_t cf,void * aux)90 pq3ehci_match(device_t parent, cfdata_t cf, void *aux)
91 {
92
93 if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux))
94 return 0;
95
96 return 1;
97 }
98
99 static void
pq3ehci_attach(device_t parent,device_t self,void * aux)100 pq3ehci_attach(device_t parent, device_t self, void *aux)
101 {
102 struct cpunode_softc * const psc = device_private(parent);
103 struct pq3ehci_softc * const sc = device_private(self);
104 struct cpunode_attach_args * const cna = aux;
105 struct cpunode_locators * const cnl = &cna->cna_locs;
106 int error;
107
108 psc->sc_children |= cna->cna_childmask;
109 sc->sc.iot = cna->cna_le_memt; /* EHCI registers are little endian */
110 sc->sc.sc_dev = self;
111 sc->sc.sc_bus.ub_dmatag = cna->cna_dmat;
112 sc->sc.sc_bus.ub_hcpriv = sc;
113 sc->sc.sc_bus.ub_revision = USBREV_2_0;
114 sc->sc.sc_ncomp = 0;
115 sc->sc.sc_flags |= EHCIF_ETTF;
116 sc->sc.sc_vendor_init = pq3ehci_init;
117
118 aprint_naive(": USB controller\n");
119 aprint_normal(": USB controller\n");
120
121 error = bus_space_map(sc->sc.iot, cnl->cnl_addr, cnl->cnl_size, 0,
122 &sc->sc.ioh);
123 if (error) {
124 aprint_error_dev(self,
125 "can't map registers for %s#%u: %d\n",
126 cnl->cnl_name, cnl->cnl_instance, error);
127 return;
128 }
129 sc->sc.sc_size = cnl->cnl_size;
130
131 /*
132 * We need to tell the USB interface to snoop all off RAM starting
133 * at 0. Since it can do it by powers of 2, get the highest RAM
134 * address and roughly round it to the next power of 2 and find
135 * the number of leading zero bits.
136 */
137 cpu_write_4(cnl->cnl_addr + USB_SNOOP1,
138 SNOOP_2GB - __builtin_clz(curcpu()->ci_softc->cpu_highmem * 2 - 1));
139 cpu_write_4(cnl->cnl_addr + USB_CONTROL, USB_EN);
140
141 sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_USB, IST_ONCHIP,
142 ehci_intr, sc);
143 if (sc->sc_ih == NULL) {
144 aprint_error_dev(self, "failed to establish interrupt %d\n",
145 cnl->cnl_intrs[0]);
146 goto fail;
147 }
148 aprint_normal_dev(self, "interrupting on irq %d\n",
149 cnl->cnl_intrs[0]);
150
151 /* offs is needed for EOWRITEx */
152 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
153
154 /* Disable interrupts, so we don't get any spurious ones. */
155 DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs));
156 EOWRITE4(&sc->sc, EHCI_USBINTR, 0);
157
158 error = ehci_init(&sc->sc);
159 if (error) {
160 aprint_error_dev(self, "init failed, error=%d\n", error);
161 goto fail;
162 }
163
164 /* Attach usb device. */
165 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint,
166 CFARGS_NONE);
167 return;
168
169 fail:
170 if (sc->sc_ih) {
171 intr_disestablish(sc->sc_ih);
172 sc->sc_ih = NULL;
173 }
174 if (sc->sc.sc_size) {
175 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
176 sc->sc.sc_size = 0;
177 }
178 return;
179 }
180
181 static void
pq3ehci_init(struct ehci_softc * hsc)182 pq3ehci_init(struct ehci_softc *hsc)
183 {
184 uint32_t old = bus_space_read_4(hsc->iot, hsc->ioh, PQ3_USBMODE);
185 uint32_t reg = old;
186
187 reg &= ~USBMODE_CM;
188 reg |= USBMODE_CM_HOST;
189 if (reg != old)
190 bus_space_write_4(hsc->iot, hsc->ioh, PQ3_USBMODE, reg);
191 }
192