1 /* $NetBSD: pq3diic.c,v 1.2 2011/01/18 01:02:53 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 39 #include <sys/param.h> 40 #include <sys/cpu.h> 41 #include <sys/device.h> 42 #include <sys/tty.h> 43 44 #include "ioconf.h" 45 46 #include <sys/intr.h> 47 #include <sys/bus.h> 48 49 #include <dev/i2c/i2cvar.h> 50 51 #include <dev/i2c/motoi2creg.h> 52 #include <dev/i2c/motoi2cvar.h> 53 54 #include <powerpc/booke/cpuvar.h> 55 #include <powerpc/booke/e500var.h> 56 #include <powerpc/booke/e500reg.h> 57 58 struct pq3diic_softc { 59 device_t sc_dev; 60 void *sc_ih; 61 struct motoi2c_softc sc_motoi2c[2]; 62 }; 63 64 static int pq3diic_match(device_t, cfdata_t, void *); 65 static void pq3diic_attach(device_t, device_t, void *); 66 67 CFATTACH_DECL_NEW(pq3diic, sizeof(struct pq3diic_softc), 68 pq3diic_match, pq3diic_attach, NULL, NULL); 69 70 static int 71 pq3diic_match(device_t parent, cfdata_t cf, void *aux) 72 { 73 74 if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux)) 75 return 0; 76 77 return 1; 78 } 79 80 static int 81 pq3diic_intr(void *arg) 82 { 83 struct pq3diic_softc * const sc = arg; 84 int rv = 0; 85 86 rv += motoi2c_intr(&sc->sc_motoi2c[0]); 87 rv += motoi2c_intr(&sc->sc_motoi2c[1]); 88 89 return rv; 90 } 91 92 static void 93 pq3diic_attach(device_t parent, device_t self, void *aux) 94 { 95 struct cpunode_softc * const psc = device_private(parent); 96 struct pq3diic_softc * const sc = device_private(self); 97 struct cpunode_attach_args * const cna = aux; 98 struct cpunode_locators * const cnl = &cna->cna_locs; 99 u_int nports = cnl->cnl_size / I2C_SIZE; 100 int error; 101 102 psc->sc_children |= cna->cna_childmask; 103 sc->sc_dev = self; 104 105 aprint_normal(": %u port%s\n", nports, nports == 1 ? "" : "s"); 106 107 for (u_int port = 0; port <= min(1, nports); port++) { 108 struct motoi2c_softc * const msc = &sc->sc_motoi2c[port]; 109 msc->sc_iot = cna->cna_memt; 110 error = bus_space_map(msc->sc_iot, 111 cnl->cnl_addr + port * I2C_SIZE, 112 I2C_SIZE, 0, &msc->sc_ioh); 113 if (error) { 114 aprint_error_dev(self, 115 "can't map registers for i2c#%uL %d\n", 116 port, error); 117 } else { 118 motoi2c_attach_common(self, msc, NULL); 119 } 120 } 121 122 sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP, 123 pq3diic_intr, sc); 124 if (sc->sc_ih == NULL) 125 aprint_error_dev(self, "failed to establish interrupt %d\n", 126 cnl->cnl_intrs[0]); 127 else 128 aprint_normal_dev(self, "interrupting on irq %d\n", 129 cnl->cnl_intrs[0]); 130 } 131