1 /* $NetBSD: mips_param.h,v 1.50 2021/05/23 23:24:45 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 /* 29 * No reason this can't be common 30 */ 31 #if defined(__MIPSEB__) 32 # define _MACHINE_SUFFIX eb 33 # define MACHINE_SUFFIX "eb" 34 #elif defined(__MIPSEL__) 35 # define _MACHINE_SUFFIX el 36 # define MACHINE_SUFFIX "el" 37 #else 38 # error neither __MIPSEL__ nor __MIPSEB__ are defined. 39 #endif 40 41 #define ___MACHINE32_OARCH mips##_MACHINE_SUFFIX 42 #define __MACHINE32_OARCH "mips" MACHINE_SUFFIX 43 #define ___MACHINE32_NARCH mips64##_MACHINE_SUFFIX 44 #define __MACHINE32_NARCH "mips64" MACHINE_SUFFIX 45 #define ___MACHINE64_NARCH mipsn64##_MACHINE_SUFFIX 46 #define __MACHINE64_NARCH "mipsn64" MACHINE_SUFFIX 47 48 #if defined(__mips_n32) || defined(__mips_n64) 49 # if defined(__mips_n32) 50 # define _MACHINE_ARCH ___MACHINE32_NARCH 51 # define MACHINE_ARCH __MACHINE32_NARCH 52 # else /* __mips_n64 */ 53 # define _MACHINE_ARCH ___MACHINE64_NARCH 54 # define MACHINE_ARCH __MACHINE64_NARCH 55 # define _MACHINE32_NARCH ___MACHINE32_NARCH 56 # define MACHINE32_NARCH __MACHINE32_NARCH 57 # endif 58 # define _MACHINE32_OARCH ___MACHINE32_OARCH 59 # define MACHINE32_OARCH __MACHINE32_OARCH 60 #else /* o32 */ 61 # define _MACHINE_ARCH ___MACHINE32_OARCH 62 # define MACHINE_ARCH __MACHINE32_OARCH 63 #endif 64 65 /* 66 * Userland code should be using uname/sysctl to get MACHINE so simply 67 * export a generic MACHINE of "mips" 68 */ 69 #ifndef _KERNEL 70 #undef MACHINE 71 #define MACHINE "mips" 72 #endif 73 74 #define ALIGNBYTES32 (sizeof(double) - 1) 75 #define ALIGN32(p) (((uintptr_t)(p) + ALIGNBYTES32) &~ALIGNBYTES32) 76 77 /* 78 * On mips, UPAGES is fixed by sys/arch/mips/mips/locore code 79 * to be the number of per-process-wired kernel-stack pages/PTES. 80 */ 81 82 #define SSIZE 1 /* initial stack size/NBPG */ 83 #define SINCR 1 /* increment of stack/NBPG */ 84 85 #if (ENABLE_MIPS_16KB_PAGE + ENABLE_MIPS_8KB_PAGE + ENABLE_MIPS_4KB_PAGE) > 1 86 #error only one of ENABLE_MIPS_{4,8,16}KB_PAGE can be defined. 87 #endif 88 89 #ifndef MSGBUFSIZE 90 #define MSGBUFSIZE NBPG /* default message buffer size */ 91 #endif 92 93 /* 94 * Most MIPS have a cache line size of 32 bytes, but Cavium chips 95 * have a line size 128 bytes and we need to cover the larger size. 96 */ 97 #define COHERENCY_UNIT 128 98 #define CACHE_LINE_SIZE 128 99 100 #ifdef ENABLE_MIPS_16KB_PAGE 101 #define PGSHIFT 14 /* LOG2(NBPG) */ 102 #elif defined(ENABLE_MIPS_8KB_PAGE) \ 103 || (!defined(ENABLE_MIPS_4KB_PAGE) && __mips >= 3) 104 #define PGSHIFT 13 /* LOG2(NBPG) */ 105 #else 106 #define PGSHIFT 12 /* LOG2(NBPG) */ 107 #endif 108 #define NBPG (1 << PGSHIFT) /* bytes/page */ 109 #define PGOFSET (NBPG - 1) /* byte offset into page */ 110 #define PTPSHIFT 2 111 #define PTPLENGTH (PGSHIFT - PTPSHIFT) 112 #define NPTEPG (1 << PTPLENGTH) 113 114 #define SEGSHIFT (PGSHIFT + PTPLENGTH) /* LOG2(NBSEG) */ 115 #define NBSEG (1 << SEGSHIFT) /* bytes/segment */ 116 #define SEGOFSET (NBSEG - 1) /* byte offset into segment */ 117 118 #ifdef _LP64 119 #define SEGLENGTH (PGSHIFT - 3) 120 #define XSEGSHIFT (SEGSHIFT + SEGLENGTH) /* LOG2(NBXSEG) */ 121 #define NBXSEG (1UL << XSEGSHIFT) /* bytes/xsegment */ 122 #define XSEGOFSET (NBXSEG - 1) /* byte offset into xsegment */ 123 #define XSEGLENGTH (PGSHIFT - 3) 124 #define NXSEGPG (1 << XSEGLENGTH) 125 #else 126 #define SEGLENGTH (31 - SEGSHIFT) 127 #endif 128 #define NSEGPG (1 << SEGLENGTH) 129 130 #ifdef _LP64 131 #define __MIN_USPACE 16384 /* LP64 needs a 16kB stack */ 132 #else 133 /* 134 * Note for the non-LP64 case, cpu_switch_resume has the assumption 135 * that UPAGES == 2. For MIPS-I we wire USPACE in TLB #0 and #1. 136 * For MIPS3+ we wire USPACE in the the TLB #0 pair. 137 */ 138 #define __MIN_USPACE 8192 /* otherwise use an 8kB stack */ 139 #endif 140 #define USPACE MAX(__MIN_USPACE, PAGE_SIZE) 141 #define UPAGES (USPACE / PAGE_SIZE) /* number of pages for u-area */ 142 #define USPACE_ALIGN USPACE /* make sure it starts on a even VA */ 143 #define UPAGES_MAX 8 /* a (constant) max for userland use */ 144 145 /* 146 * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized 147 * logical pages. 148 */ 149 #define NKMEMPAGES_MIN_DEFAULT ((8 * 1024 * 1024) >> PAGE_SHIFT) 150 #define NKMEMPAGES_MAX_DEFAULT ((128 * 1024 * 1024) >> PAGE_SHIFT) 151 152 /* 153 * Mach derived conversion macros 154 */ 155 #define mips_round_page(x) ((((uintptr_t)(x)) + NBPG - 1) & ~(NBPG-1)) 156 #define mips_trunc_page(x) ((uintptr_t)(x) & ~(NBPG-1)) 157 #define mips_btop(x) ((paddr_t)(x) >> PGSHIFT) 158 #define mips_ptob(x) ((paddr_t)(x) << PGSHIFT) 159 160 #ifdef __MIPSEL__ 161 #define MID_MACHINE MID_PMAX /* MID_PMAX (little-endian) */ 162 #endif 163 #ifdef __MIPSEB__ 164 #define MID_MACHINE MID_MIPS /* MID_MIPS (big-endian) */ 165 #endif 166 167 /* 168 * Constants related to network buffer management. 169 * MCLBYTES must be no larger than NBPG (the software page size), and, 170 * on machines that exchange pages of input or output buffers with mbuf 171 * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple 172 * of the hardware page size. 173 */ 174 #ifndef MSIZE 175 #ifdef _LP64 176 #define MSIZE 512 /* size of an mbuf */ 177 #else 178 #define MSIZE 256 /* size of an mbuf */ 179 #endif 180 181 #ifndef MCLSHIFT 182 # define MCLSHIFT 11 /* convert bytes to m_buf clusters */ 183 #endif /* MCLSHIFT */ 184 185 #define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */ 186 187 #endif 188