1 /* $NetBSD: mips_param.h,v 1.52 2021/10/04 21:02:40 andvar Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #ifdef _KERNEL_OPT 30 #include "opt_param.h" 31 #endif 32 33 /* 34 * No reason this can't be common 35 */ 36 #if defined(__MIPSEB__) 37 # define _MACHINE_SUFFIX eb 38 # define MACHINE_SUFFIX "eb" 39 #elif defined(__MIPSEL__) 40 # define _MACHINE_SUFFIX el 41 # define MACHINE_SUFFIX "el" 42 #else 43 # error neither __MIPSEL__ nor __MIPSEB__ are defined. 44 #endif 45 46 #define ___MACHINE32_OARCH mips##_MACHINE_SUFFIX 47 #define __MACHINE32_OARCH "mips" MACHINE_SUFFIX 48 #define ___MACHINE32_NARCH mips64##_MACHINE_SUFFIX 49 #define __MACHINE32_NARCH "mips64" MACHINE_SUFFIX 50 #define ___MACHINE64_NARCH mipsn64##_MACHINE_SUFFIX 51 #define __MACHINE64_NARCH "mipsn64" MACHINE_SUFFIX 52 53 #if defined(__mips_n32) || defined(__mips_n64) 54 # if defined(__mips_n32) 55 # define _MACHINE_ARCH ___MACHINE32_NARCH 56 # define MACHINE_ARCH __MACHINE32_NARCH 57 # else /* __mips_n64 */ 58 # define _MACHINE_ARCH ___MACHINE64_NARCH 59 # define MACHINE_ARCH __MACHINE64_NARCH 60 # define _MACHINE32_NARCH ___MACHINE32_NARCH 61 # define MACHINE32_NARCH __MACHINE32_NARCH 62 # endif 63 # define _MACHINE32_OARCH ___MACHINE32_OARCH 64 # define MACHINE32_OARCH __MACHINE32_OARCH 65 #else /* o32 */ 66 # define _MACHINE_ARCH ___MACHINE32_OARCH 67 # define MACHINE_ARCH __MACHINE32_OARCH 68 #endif 69 70 /* 71 * Userland code should be using uname/sysctl to get MACHINE so simply 72 * export a generic MACHINE of "mips" 73 */ 74 #ifndef _KERNEL 75 #undef MACHINE 76 #define MACHINE "mips" 77 #endif 78 79 #define ALIGNBYTES32 (sizeof(double) - 1) 80 #define ALIGN32(p) (((uintptr_t)(p) + ALIGNBYTES32) &~ALIGNBYTES32) 81 82 /* 83 * On mips, UPAGES is fixed by sys/arch/mips/mips/locore code 84 * to be the number of per-process-wired kernel-stack pages/PTES. 85 */ 86 87 #define SSIZE 1 /* initial stack size/NBPG */ 88 #define SINCR 1 /* increment of stack/NBPG */ 89 90 #if (ENABLE_MIPS_16KB_PAGE + ENABLE_MIPS_8KB_PAGE + ENABLE_MIPS_4KB_PAGE) > 1 91 #error only one of ENABLE_MIPS_{4,8,16}KB_PAGE can be defined. 92 #endif 93 94 #ifndef MSGBUFSIZE 95 #define MSGBUFSIZE NBPG /* default message buffer size */ 96 #endif 97 98 /* 99 * Most MIPS have a cache line size of 32 bytes, but Cavium chips 100 * have a line size 128 bytes and we need to cover the larger size. 101 */ 102 #define COHERENCY_UNIT 128 103 #define CACHE_LINE_SIZE 128 104 105 #ifdef ENABLE_MIPS_16KB_PAGE 106 #define PGSHIFT 14 /* LOG2(NBPG) */ 107 #elif defined(ENABLE_MIPS_8KB_PAGE) \ 108 || (!defined(ENABLE_MIPS_4KB_PAGE) && __mips >= 3) 109 #define PGSHIFT 13 /* LOG2(NBPG) */ 110 #else 111 #define PGSHIFT 12 /* LOG2(NBPG) */ 112 #endif 113 #define NBPG (1 << PGSHIFT) /* bytes/page */ 114 #define PGOFSET (NBPG - 1) /* byte offset into page */ 115 #define PTPSHIFT 2 116 #define PTPLENGTH (PGSHIFT - PTPSHIFT) 117 #define NPTEPG (1 << PTPLENGTH) 118 119 #define SEGSHIFT (PGSHIFT + PTPLENGTH) /* LOG2(NBSEG) */ 120 #define NBSEG (1 << SEGSHIFT) /* bytes/segment */ 121 #define SEGOFSET (NBSEG - 1) /* byte offset into segment */ 122 123 #ifdef _LP64 124 #define SEGLENGTH (PGSHIFT - 3) 125 #define XSEGSHIFT (SEGSHIFT + SEGLENGTH) /* LOG2(NBXSEG) */ 126 #define NBXSEG (1UL << XSEGSHIFT) /* bytes/xsegment */ 127 #define XSEGOFSET (NBXSEG - 1) /* byte offset into xsegment */ 128 #define XSEGLENGTH (PGSHIFT - 3) 129 #define NXSEGPG (1 << XSEGLENGTH) 130 #else 131 #define SEGLENGTH (31 - SEGSHIFT) 132 #endif 133 #define NSEGPG (1 << SEGLENGTH) 134 135 #ifdef _LP64 136 #define __MIN_USPACE 16384 /* LP64 needs a 16kB stack */ 137 #else 138 /* 139 * Note for the non-LP64 case, cpu_switch_resume has the assumption 140 * that UPAGES == 2. For MIPS-I we wire USPACE in TLB #0 and #1. 141 * For MIPS3+ we wire USPACE in the TLB #0 pair. 142 */ 143 #define __MIN_USPACE 8192 /* otherwise use an 8kB stack */ 144 #endif 145 #define USPACE MAX(__MIN_USPACE, PAGE_SIZE) 146 #define UPAGES (USPACE / PAGE_SIZE) /* number of pages for u-area */ 147 #define USPACE_ALIGN USPACE /* make sure it starts on a even VA */ 148 #define UPAGES_MAX 8 /* a (constant) max for userland use */ 149 150 /* 151 * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized 152 * logical pages. 153 */ 154 #define NKMEMPAGES_MIN_DEFAULT ((8 * 1024 * 1024) >> PAGE_SHIFT) 155 #define NKMEMPAGES_MAX_DEFAULT ((128 * 1024 * 1024) >> PAGE_SHIFT) 156 157 /* 158 * Mach derived conversion macros 159 */ 160 #define mips_round_page(x) ((((uintptr_t)(x)) + NBPG - 1) & ~(NBPG-1)) 161 #define mips_trunc_page(x) ((uintptr_t)(x) & ~(NBPG-1)) 162 #define mips_btop(x) ((paddr_t)(x) >> PGSHIFT) 163 #define mips_ptob(x) ((paddr_t)(x) << PGSHIFT) 164 165 #ifdef __MIPSEL__ 166 #define MID_MACHINE MID_PMAX /* MID_PMAX (little-endian) */ 167 #endif 168 #ifdef __MIPSEB__ 169 #define MID_MACHINE MID_MIPS /* MID_MIPS (big-endian) */ 170 #endif 171 172 /* 173 * Constants related to network buffer management. 174 * MCLBYTES must be no larger than NBPG (the software page size), and, 175 * on machines that exchange pages of input or output buffers with mbuf 176 * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple 177 * of the hardware page size. 178 */ 179 #ifndef MSIZE 180 #ifdef _LP64 181 #define MSIZE 512 /* size of an mbuf */ 182 #else 183 #define MSIZE 256 /* size of an mbuf */ 184 #endif 185 186 #ifndef MCLSHIFT 187 # define MCLSHIFT 11 /* convert bytes to m_buf clusters */ 188 #endif /* MCLSHIFT */ 189 190 #define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */ 191 192 #endif 193