1 /* $NetBSD: ohci_aubus.c,v 1.15 2011/07/01 18:39:29 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Herb Peyerl of Middle Digital Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ohci_aubus.c,v 1.15 2011/07/01 18:39:29 dyoung Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 39 #include <sys/bus.h> 40 41 #include <mips/alchemy/include/aureg.h> 42 #include <mips/alchemy/include/auvar.h> 43 #include <mips/alchemy/include/aubusvar.h> 44 #include <mips/alchemy/dev/ohcireg.h> 45 46 #include <dev/usb/usb.h> 47 #include <dev/usb/usbdi.h> 48 #include <dev/usb/usbdivar.h> 49 #include <dev/usb/usb_mem.h> 50 51 #include <dev/usb/ohcireg.h> 52 #include <dev/usb/ohcivar.h> 53 54 55 static int ohci_aubus_match(device_t, cfdata_t, void *); 56 static void ohci_aubus_attach(device_t, device_t, void *); 57 58 CFATTACH_DECL_NEW(ohci_aubus, sizeof (ohci_softc_t), 59 ohci_aubus_match, ohci_aubus_attach, NULL, NULL); 60 61 int 62 ohci_aubus_match(device_t parent, cfdata_t match, void *aux) 63 { 64 struct aubus_attach_args *aa = aux; 65 66 if (strcmp(aa->aa_name, match->cf_name) == 0) 67 return (1); 68 69 return (0); 70 } 71 72 void 73 ohci_aubus_attach(device_t parent, device_t self, void *aux) 74 { 75 ohci_softc_t *sc = device_private(self); 76 void *ih; 77 usbd_status r; 78 uint32_t x, tmp; 79 bus_addr_t usbh_base, usbh_enable; 80 struct aubus_attach_args *aa = aux; 81 82 r = 0; 83 84 usbh_base = aa->aa_addrs[0]; 85 usbh_enable = aa->aa_addrs[1]; 86 sc->sc_size = aa->aa_addrs[2]; 87 sc->iot = aa->aa_st; 88 sc->sc_bus.dmatag = (bus_dma_tag_t)aa->aa_dt; 89 90 sc->sc_dev = self; 91 sc->sc_bus.hci_private = sc; 92 93 if (bus_space_map(sc->iot, usbh_base, sc->sc_size, 0, &sc->ioh)) { 94 aprint_error_dev(self, "unable to map USBH registers\n"); 95 return; 96 } 97 /* 98 * Enable the USB Host controller here. 99 * As per 7.2 in the Au1500 manual: 100 * 101 * (1) Set CE bit to enable clocks. 102 * (2) Set E to enable OHCI 103 * (3) Clear HCFS in OHCI_CONTROL. 104 * (4) Wait for RD bit to be set. 105 */ 106 x = bus_space_read_4(sc->iot, sc->ioh, usbh_enable); 107 x |= UE_CE; 108 bus_space_write_4(sc->iot, sc->ioh, usbh_enable, x); 109 delay(10); 110 x |= UE_E; 111 #ifdef __MIPSEB__ 112 x |= UE_BE; 113 #endif 114 bus_space_write_4(sc->iot, sc->ioh, usbh_enable, x); 115 delay(10); 116 x = bus_space_read_4(sc->iot, sc->ioh, OHCI_CONTROL); 117 x &= ~(OHCI_HCFS_MASK); 118 bus_space_write_4(sc->iot, sc->ioh, OHCI_CONTROL, x); 119 delay(10); 120 /* Need to read USBH_ENABLE twice in succession according to 121 * au1500 Errata #7. 122 */ 123 for (x = 100; x; x--) { 124 bus_space_read_4(sc->iot, sc->ioh, usbh_enable); 125 tmp = bus_space_read_4(sc->iot, sc->ioh, usbh_enable); 126 if (tmp&UE_RD) 127 break; 128 delay(1000); 129 } 130 printf(": Alchemy OHCI\n"); 131 132 /* Disable OHCI interrupts */ 133 bus_space_write_4(sc->iot, sc->ioh, OHCI_INTERRUPT_DISABLE, 134 OHCI_ALL_INTRS); 135 /* hook interrupt */ 136 ih = au_intr_establish(aa->aa_irq[0], 0, IPL_USB, IST_LEVEL_LOW, 137 ohci_intr, sc); 138 if (ih == NULL) { 139 aprint_error_dev(self,"couldn't establish interrupt\n"); 140 } 141 142 sc->sc_endian = OHCI_HOST_ENDIAN; 143 144 if (x) 145 r = ohci_init(sc); 146 if (r != USBD_NORMAL_COMPLETION) { 147 aprint_error_dev(self, "init failed, error=%d\n", r); 148 au_intr_disestablish(ih); 149 return; 150 } 151 152 /* Attach USB device */ 153 sc->sc_child = config_found(self, &sc->sc_bus, usbctlprint); 154 155 } 156