1 /* $NetBSD: ohci_aubus.c,v 1.18 2021/08/07 16:18:58 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000, 2002, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Herb Peyerl of Middle Digital Inc.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ohci_aubus.c,v 1.18 2021/08/07 16:18:58 thorpej Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38
39 #include <sys/bus.h>
40
41 #include <mips/alchemy/include/aureg.h>
42 #include <mips/alchemy/include/auvar.h>
43 #include <mips/alchemy/include/aubusvar.h>
44 #include <mips/alchemy/dev/ohcireg.h>
45
46 #include <dev/usb/usb.h>
47 #include <dev/usb/usbdi.h>
48 #include <dev/usb/usbdivar.h>
49 #include <dev/usb/usb_mem.h>
50
51 #include <dev/usb/ohcireg.h>
52 #include <dev/usb/ohcivar.h>
53
54
55 static int ohci_aubus_match(device_t, cfdata_t, void *);
56 static void ohci_aubus_attach(device_t, device_t, void *);
57
58 CFATTACH_DECL_NEW(ohci_aubus, sizeof (ohci_softc_t),
59 ohci_aubus_match, ohci_aubus_attach, NULL, NULL);
60
61 int
ohci_aubus_match(device_t parent,cfdata_t match,void * aux)62 ohci_aubus_match(device_t parent, cfdata_t match, void *aux)
63 {
64 struct aubus_attach_args *aa = aux;
65
66 if (strcmp(aa->aa_name, match->cf_name) == 0)
67 return 1;
68
69 return 0;
70 }
71
72 void
ohci_aubus_attach(device_t parent,device_t self,void * aux)73 ohci_aubus_attach(device_t parent, device_t self, void *aux)
74 {
75 ohci_softc_t *sc = device_private(self);
76 void *ih;
77 uint32_t x, tmp;
78 bus_addr_t usbh_base, usbh_enable;
79 struct aubus_attach_args *aa = aux;
80
81 usbh_base = aa->aa_addrs[0];
82 usbh_enable = aa->aa_addrs[1];
83 sc->sc_size = aa->aa_addrs[2];
84 sc->iot = aa->aa_st;
85 sc->sc_bus.ub_dmatag = (bus_dma_tag_t)aa->aa_dt;
86
87 sc->sc_dev = self;
88 sc->sc_bus.ub_hcpriv = sc;
89
90 if (bus_space_map(sc->iot, usbh_base, sc->sc_size, 0, &sc->ioh)) {
91 aprint_error_dev(self, "unable to map USBH registers\n");
92 return;
93 }
94 /*
95 * Enable the USB Host controller here.
96 * As per 7.2 in the Au1500 manual:
97 *
98 * (1) Set CE bit to enable clocks.
99 * (2) Set E to enable OHCI
100 * (3) Clear HCFS in OHCI_CONTROL.
101 * (4) Wait for RD bit to be set.
102 */
103 x = bus_space_read_4(sc->iot, sc->ioh, usbh_enable);
104 x |= UE_CE;
105 bus_space_write_4(sc->iot, sc->ioh, usbh_enable, x);
106 delay(10);
107 x |= UE_E;
108 #ifdef __MIPSEB__
109 x |= UE_BE;
110 #endif
111 bus_space_write_4(sc->iot, sc->ioh, usbh_enable, x);
112 delay(10);
113 x = bus_space_read_4(sc->iot, sc->ioh, OHCI_CONTROL);
114 x &= ~(OHCI_HCFS_MASK);
115 bus_space_write_4(sc->iot, sc->ioh, OHCI_CONTROL, x);
116 delay(10);
117 /* Need to read USBH_ENABLE twice in succession according to
118 * au1500 Errata #7.
119 */
120 for (x = 100; x; x--) {
121 bus_space_read_4(sc->iot, sc->ioh, usbh_enable);
122 tmp = bus_space_read_4(sc->iot, sc->ioh, usbh_enable);
123 if (tmp&UE_RD)
124 break;
125 delay(1000);
126 }
127
128 if (x == 0) {
129 aprint_error_dev(self, "device not ready\n");
130 return;
131 }
132
133 printf(": Alchemy OHCI\n");
134
135 /* Disable OHCI interrupts */
136 bus_space_write_4(sc->iot, sc->ioh, OHCI_INTERRUPT_DISABLE,
137 OHCI_ALL_INTRS);
138 /* hook interrupt */
139 ih = au_intr_establish(aa->aa_irq[0], 0, IPL_USB, IST_LEVEL_LOW,
140 ohci_intr, sc);
141 if (ih == NULL) {
142 aprint_error_dev(self,"couldn't establish interrupt\n");
143 }
144
145 sc->sc_endian = OHCI_HOST_ENDIAN;
146
147 int err = ohci_init(sc);
148 if (err != USBD_NORMAL_COMPLETION) {
149 aprint_error_dev(self, "init failed, error=%d\n", err);
150 au_intr_disestablish(ih);
151 return;
152 }
153
154 /* Attach USB device */
155 sc->sc_child = config_found(self, &sc->sc_bus, usbctlprint, CFARGS_NONE);
156
157 }
158