1 /* $NetBSD: asm_single.h,v 1.10 2022/05/18 13:56:32 andvar Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Leo Weppelman. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #ifndef _M68K_ASM_SINGLE_H 29 #define _M68K_ASM_SINGLE_H 30 /* 31 * Provide bit manipulation macro's that resolve to a single instruction. 32 * These can be considered atomic on single processor architectures when 33 * no page faults can occur when accessing <var>. 34 * There primary use is to avoid race conditions when manipulating device 35 * registers. 36 */ 37 38 #define single_inst_bset_b(var, bit) \ 39 __asm volatile ("orb %1,%0" \ 40 : "+m" (var) \ 41 : "di" ((u_char)bit)) 42 43 #define single_inst_bclr_b(var, bit) \ 44 __asm volatile ("andb %1,%0" \ 45 : "+m" (var) \ 46 : "di" ((u_char)~(bit))) 47 48 49 #define single_inst_bset_w(var, bit) \ 50 __asm volatile ("orw %1,%0" \ 51 : "+m" (var) \ 52 : "di" ((u_short)bit)) 53 54 #define single_inst_bclr_w(var, bit) \ 55 __asm volatile ("andw %1,%0" \ 56 : "+m" (var) \ 57 : "di" ((u_short)~(bit))) 58 59 60 #define single_inst_bset_l(var, bit) \ 61 __asm volatile ("orl %1,%0" \ 62 : "+m" (var) \ 63 : "di" ((u_long)bit)) 64 65 #define single_inst_bclr_l(var, bit) \ 66 __asm volatile ("andl %1,%0" \ 67 : "+m" (var) \ 68 : "di" ((u_long)~(bit))) 69 70 #endif /* _M68K_ASM_SINGLE_H */ 71