1 /* $NetBSD: lunafb.c,v 1.27 2013/07/19 16:35:57 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Tohru Nishimura. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 33 34 __KERNEL_RCSID(0, "$NetBSD: lunafb.c,v 1.27 2013/07/19 16:35:57 tsutsui Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 #include <sys/ioctl.h> 41 #include <sys/malloc.h> 42 #include <sys/mman.h> 43 #include <sys/proc.h> 44 #include <sys/tty.h> 45 #include <sys/errno.h> 46 #include <sys/buf.h> 47 48 #include <uvm/uvm_extern.h> 49 50 #include <dev/wscons/wsconsio.h> 51 #include <dev/wscons/wsdisplayvar.h> 52 #include <dev/rasops/rasops.h> 53 54 #include <machine/cpu.h> 55 #include <machine/autoconf.h> 56 57 #include <arch/luna68k/dev/omrasopsvar.h> 58 59 #include "ioconf.h" 60 61 struct bt454 { 62 volatile uint8_t bt_addr; /* map address register */ 63 volatile uint8_t bt_cmap; /* colormap data register */ 64 }; 65 66 struct bt458 { 67 volatile uint8_t bt_addr; /* map address register */ 68 uint8_t pad0[3]; 69 volatile uint8_t bt_cmap; /* colormap data register */ 70 uint8_t pad1[3]; 71 volatile uint8_t bt_ctrl; /* control register */ 72 uint8_t pad2[3]; 73 volatile uint8_t bt_omap; /* overlay (cursor) map register */ 74 uint8_t pad3[3]; 75 }; 76 77 #define OMFB_RFCNT 0xB1000000 /* video h-origin/v-origin */ 78 #define OMFB_PLANEMASK 0xB1040000 /* planemask register */ 79 #define OMFB_FB_WADDR 0xB1080008 /* common plane */ 80 #define OMFB_FB_RADDR 0xB10C0008 /* plane #0 */ 81 #define OMFB_ROPFUNC 0xB12C0000 /* ROP function code */ 82 #define OMFB_RAMDAC 0xC1100000 /* Bt454/Bt458 RAMDAC */ 83 #define OMFB_SIZE (0xB1300000 - 0xB1080000 + PAGE_SIZE) 84 85 struct om_hwdevconfig { 86 int dc_wid; /* width of frame buffer */ 87 int dc_ht; /* height of frame buffer */ 88 int dc_depth; /* depth, bits per pixel */ 89 int dc_rowbytes; /* bytes in a FB scan line */ 90 int dc_cmsize; /* colormap size */ 91 vaddr_t dc_videobase; /* base of flat frame buffer */ 92 struct rasops_info dc_ri; /* raster blitter variables */ 93 }; 94 95 struct hwcmap { 96 #define CMAP_SIZE 256 97 uint8_t r[CMAP_SIZE]; 98 uint8_t g[CMAP_SIZE]; 99 uint8_t b[CMAP_SIZE]; 100 }; 101 102 struct omfb_softc { 103 device_t sc_dev; /* base device */ 104 struct om_hwdevconfig *sc_dc; /* device configuration */ 105 struct hwcmap sc_cmap; /* software copy of colormap */ 106 int nscreens; 107 }; 108 109 static int omgetcmap(struct omfb_softc *, struct wsdisplay_cmap *); 110 static int omsetcmap(struct omfb_softc *, struct wsdisplay_cmap *); 111 112 static struct om_hwdevconfig omfb_console_dc; 113 static void omfb_getdevconfig(paddr_t, struct om_hwdevconfig *); 114 115 static struct wsscreen_descr omfb_stdscreen = { 116 .name = "std" 117 }; 118 119 static const struct wsscreen_descr *_omfb_scrlist[] = { 120 &omfb_stdscreen, 121 }; 122 123 static const struct wsscreen_list omfb_screenlist = { 124 sizeof(_omfb_scrlist) / sizeof(struct wsscreen_descr *), _omfb_scrlist 125 }; 126 127 static int omfbioctl(void *, void *, u_long, void *, int, struct lwp *); 128 static paddr_t omfbmmap(void *, void *, off_t, int); 129 static int omfb_alloc_screen(void *, const struct wsscreen_descr *, 130 void **, int *, int *, long *); 131 static void omfb_free_screen(void *, void *); 132 static int omfb_show_screen(void *, void *, int, 133 void (*) (void *, int, int), void *); 134 135 static const struct wsdisplay_accessops omfb_accessops = { 136 omfbioctl, 137 omfbmmap, 138 omfb_alloc_screen, 139 omfb_free_screen, 140 omfb_show_screen, 141 0 /* load_font */ 142 }; 143 144 static int omfbmatch(device_t, cfdata_t, void *); 145 static void omfbattach(device_t, device_t, void *); 146 147 CFATTACH_DECL_NEW(fb, sizeof(struct omfb_softc), 148 omfbmatch, omfbattach, NULL, NULL); 149 150 extern int hwplanemask; /* hardware planemask; retrieved at boot */ 151 152 static int omfb_console; 153 int omfb_cnattach(void); 154 155 static int 156 omfbmatch(device_t parent, cfdata_t cf, void *aux) 157 { 158 struct mainbus_attach_args *ma = aux; 159 160 if (strcmp(ma->ma_name, fb_cd.cd_name)) 161 return 0; 162 #if 0 /* XXX badaddr() bombs if no framebuffer is installed */ 163 if (badaddr((void *)ma->ma_addr, 4)) 164 return 0; 165 #else 166 if (hwplanemask == 0) 167 return 0; 168 #endif 169 return 1; 170 } 171 172 static void 173 omfbattach(device_t parent, device_t self, void *args) 174 { 175 struct omfb_softc *sc = device_private(self); 176 struct wsemuldisplaydev_attach_args waa; 177 178 sc->sc_dev = self; 179 180 if (omfb_console) { 181 sc->sc_dc = &omfb_console_dc; 182 sc->nscreens = 1; 183 } else { 184 sc->sc_dc = malloc(sizeof(struct om_hwdevconfig), 185 M_DEVBUF, M_WAITOK | M_ZERO); 186 omfb_getdevconfig(OMFB_FB_WADDR, sc->sc_dc); 187 } 188 aprint_normal(": %d x %d, %dbpp\n", sc->sc_dc->dc_wid, sc->sc_dc->dc_ht, 189 sc->sc_dc->dc_depth); 190 191 /* WHITE on BLACK */ 192 memset(&sc->sc_cmap, 255, sizeof(struct hwcmap)); 193 sc->sc_cmap.r[0] = sc->sc_cmap.g[0] = sc->sc_cmap.b[0] = 0; 194 195 waa.console = omfb_console; 196 waa.scrdata = &omfb_screenlist; 197 waa.accessops = &omfb_accessops; 198 waa.accesscookie = sc; 199 200 config_found(self, &waa, wsemuldisplaydevprint); 201 } 202 203 /* EXPORT */ int 204 omfb_cnattach(void) 205 { 206 struct om_hwdevconfig *dc = &omfb_console_dc; 207 struct rasops_info *ri = &dc->dc_ri; 208 long defattr; 209 210 omfb_getdevconfig(OMFB_FB_WADDR, dc); 211 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 212 wsdisplay_cnattach(&omfb_stdscreen, ri, 0, 0, defattr); 213 omfb_console = 1; 214 return 0; 215 } 216 217 static int 218 omfbioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 219 { 220 struct omfb_softc *sc = v; 221 struct om_hwdevconfig *dc = sc->sc_dc; 222 223 switch (cmd) { 224 case WSDISPLAYIO_GTYPE: 225 *(u_int *)data = WSDISPLAY_TYPE_LUNA; 226 return 0; 227 228 case WSDISPLAYIO_GINFO: 229 #define wsd_fbip ((struct wsdisplay_fbinfo *)data) 230 wsd_fbip->height = dc->dc_ht; 231 wsd_fbip->width = dc->dc_wid; 232 wsd_fbip->depth = dc->dc_depth; 233 wsd_fbip->cmsize = dc->dc_cmsize; 234 #undef fbt 235 return 0; 236 237 case WSDISPLAYIO_LINEBYTES: 238 *(u_int *)data = dc->dc_rowbytes; 239 return 0; 240 241 case WSDISPLAYIO_GETCMAP: 242 return omgetcmap(sc, (struct wsdisplay_cmap *)data); 243 244 case WSDISPLAYIO_PUTCMAP: 245 return omsetcmap(sc, (struct wsdisplay_cmap *)data); 246 247 case WSDISPLAYIO_SVIDEO: 248 case WSDISPLAYIO_GVIDEO: 249 case WSDISPLAYIO_GCURPOS: 250 case WSDISPLAYIO_SCURPOS: 251 case WSDISPLAYIO_GCURMAX: 252 case WSDISPLAYIO_GCURSOR: 253 case WSDISPLAYIO_SCURSOR: 254 break; 255 } 256 return EPASSTHROUGH; 257 } 258 259 /* 260 * Return the address that would map the given device at the given 261 * offset, allowing for the given protection, or return -1 for error. 262 */ 263 static paddr_t 264 omfbmmap(void *v, void *vs, off_t offset, int prot) 265 { 266 struct omfb_softc *sc = v; 267 struct om_hwdevconfig *dc = sc->sc_dc; 268 paddr_t cookie = -1; 269 270 #if 0 /* XXX: quick workaround to make X.Org mono server work */ 271 if (offset >= 0 && offset < OMFB_SIZE) 272 cookie = m68k_btop(m68k_trunc_page(dc->dc_videobase) + offset); 273 #else 274 if (offset >= 0 && offset < dc->dc_rowbytes * dc->dc_ht) 275 cookie = m68k_btop(m68k_trunc_page(OMFB_FB_RADDR) + offset); 276 #endif 277 278 return cookie; 279 } 280 281 static int 282 omgetcmap(struct omfb_softc *sc, struct wsdisplay_cmap *p) 283 { 284 u_int index = p->index, count = p->count; 285 int cmsize, error; 286 287 cmsize = sc->sc_dc->dc_cmsize; 288 if (index >= cmsize || count > cmsize - index) 289 return EINVAL; 290 291 error = copyout(&sc->sc_cmap.r[index], p->red, count); 292 if (error) 293 return error; 294 error = copyout(&sc->sc_cmap.g[index], p->green, count); 295 if (error) 296 return error; 297 error = copyout(&sc->sc_cmap.b[index], p->blue, count); 298 return error; 299 } 300 301 static int 302 omsetcmap(struct omfb_softc *sc, struct wsdisplay_cmap *p) 303 { 304 struct hwcmap cmap; 305 u_int index = p->index, count = p->count; 306 int cmsize, i, error; 307 308 cmsize = sc->sc_dc->dc_cmsize; 309 if (index >= cmsize || (index + count) > cmsize) 310 return (EINVAL); 311 312 error = copyin(p->red, &cmap.r[index], count); 313 if (error) 314 return error; 315 error = copyin(p->green, &cmap.g[index], count); 316 if (error) 317 return error; 318 error = copyin(p->blue, &cmap.b[index], count); 319 if (error) 320 return error; 321 322 memcpy(&sc->sc_cmap.r[index], &cmap.r[index], count); 323 memcpy(&sc->sc_cmap.g[index], &cmap.g[index], count); 324 memcpy(&sc->sc_cmap.b[index], &cmap.b[index], count); 325 if (hwplanemask == 0x0f) { 326 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 327 odac->bt_addr = index; 328 for (i = index; i < index + count; i++) { 329 odac->bt_cmap = sc->sc_cmap.r[i]; 330 odac->bt_cmap = sc->sc_cmap.g[i]; 331 odac->bt_cmap = sc->sc_cmap.b[i]; 332 } 333 } else if (hwplanemask == 0xff) { 334 struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC; 335 ndac->bt_addr = index; 336 for (i = index; i < index + count; i++) { 337 ndac->bt_cmap = sc->sc_cmap.r[i]; 338 ndac->bt_cmap = sc->sc_cmap.g[i]; 339 ndac->bt_cmap = sc->sc_cmap.b[i]; 340 } 341 } 342 return 0; 343 } 344 345 static void 346 omfb_getdevconfig(paddr_t paddr, struct om_hwdevconfig *dc) 347 { 348 int bpp, i; 349 struct rasops_info *ri; 350 union { 351 struct { short h, v; } p; 352 uint32_t u; 353 } rfcnt; 354 355 switch (hwplanemask) { 356 case 0xff: 357 bpp = 8; /* XXX check monochrome bit in DIPSW */ 358 break; 359 default: 360 case 0x0f: 361 #if 0 362 /* 363 * XXX 364 * experiment resulted in WHITE on SKYBLUE after Xorg server 365 * touches pallete. Disable 4bpp for now. 366 */ 367 bpp = 4; /* XXX check monochrome bit in DIPSW */ 368 break; 369 #endif 370 case 1: 371 bpp = 1; 372 break; 373 } 374 dc->dc_wid = 1280; 375 dc->dc_ht = 1024; 376 dc->dc_depth = bpp; 377 dc->dc_rowbytes = 2048 / 8; 378 dc->dc_cmsize = (bpp == 1) ? 0 : 1 << bpp; 379 dc->dc_videobase = paddr; 380 381 /* WHITE on BLACK */ 382 if (hwplanemask == 0x01) { 383 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 384 385 /* 386 * On 1bpp framebuffer, only plane P0 has framebuffer memory 387 * and other planes seems pulled up, i.e. always 1. 388 * Set white only for a palette (P0,P1,P2,P3) = (1,1,1,1). 389 */ 390 odac->bt_addr = 0; 391 for (i = 0; i < 15; i++) { 392 odac->bt_cmap = 0; 393 odac->bt_cmap = 0; 394 odac->bt_cmap = 0; 395 } 396 /* 397 * The B/W video connector is connected to IOG of Bt454, 398 * and IOR and IOB are unused. 399 */ 400 odac->bt_cmap = 0; 401 odac->bt_cmap = 255; 402 odac->bt_cmap = 0; 403 } else if (hwplanemask == 0x0f) { 404 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 405 406 odac->bt_addr = 0; 407 odac->bt_cmap = 0; 408 odac->bt_cmap = 0; 409 odac->bt_cmap = 0; 410 for (i = 1; i < 16; i++) { 411 odac->bt_cmap = 255; 412 odac->bt_cmap = 255; 413 odac->bt_cmap = 255; 414 } 415 } else if (hwplanemask == 0xff) { 416 struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC; 417 418 ndac->bt_addr = 0x04; 419 ndac->bt_ctrl = 0xff; /* all planes will be read */ 420 ndac->bt_ctrl = 0x00; /* all planes have non-blink */ 421 ndac->bt_ctrl = 0x43; /* pallete enabled, ovly plane */ 422 ndac->bt_ctrl = 0x00; /* no test mode */ 423 ndac->bt_addr = 0; 424 ndac->bt_cmap = 0; 425 ndac->bt_cmap = 0; 426 ndac->bt_cmap = 0; 427 for (i = 1; i < 256; i++) { 428 ndac->bt_cmap = 255; 429 ndac->bt_cmap = 255; 430 ndac->bt_cmap = 255; 431 } 432 } 433 434 /* adjust h/v origin on screen */ 435 rfcnt.p.h = 7; 436 rfcnt.p.v = -27; 437 /* single write of 0x007ffe6 */ 438 *(volatile uint32_t *)OMFB_RFCNT = rfcnt.u; 439 440 /* clear the screen */ 441 *(volatile uint32_t *)OMFB_PLANEMASK = 0xff; 442 ((volatile uint32_t *)OMFB_ROPFUNC)[5] = ~0; /* ROP copy */ 443 for (i = 0; i < dc->dc_ht * dc->dc_rowbytes / sizeof(uint32_t); i++) 444 *((volatile uint32_t *)dc->dc_videobase + i) = 0; 445 *(volatile uint32_t *)OMFB_PLANEMASK = 0x01; 446 447 /* initialize the raster */ 448 ri = &dc->dc_ri; 449 ri->ri_width = dc->dc_wid; 450 ri->ri_height = dc->dc_ht; 451 ri->ri_depth = 1; /* since planes are independently addressed */ 452 ri->ri_stride = dc->dc_rowbytes; 453 ri->ri_bits = (void *)dc->dc_videobase; 454 ri->ri_flg = RI_CENTER; 455 if (dc == &omfb_console_dc) 456 ri->ri_flg |= RI_NO_AUTO; 457 ri->ri_hw = dc; 458 459 omrasops_init(ri, 34, 80); 460 461 omfb_stdscreen.nrows = ri->ri_rows; 462 omfb_stdscreen.ncols = ri->ri_cols; 463 omfb_stdscreen.textops = &ri->ri_ops; 464 omfb_stdscreen.fontwidth = ri->ri_font->fontwidth; 465 omfb_stdscreen.fontheight = ri->ri_font->fontheight; 466 } 467 468 static int 469 omfb_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, 470 int *curxp, int *curyp, long *attrp) 471 { 472 struct omfb_softc *sc = v; 473 struct rasops_info *ri = &sc->sc_dc->dc_ri; 474 475 if (sc->nscreens > 0) 476 return ENOMEM; 477 478 *cookiep = ri; 479 *curxp = 0; 480 *curyp = 0; 481 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, attrp); 482 sc->nscreens++; 483 return 0; 484 } 485 486 static void 487 omfb_free_screen(void *v, void *cookie) 488 { 489 struct omfb_softc *sc = v; 490 491 if (sc->sc_dc == &omfb_console_dc) 492 panic("omfb_free_screen: console"); 493 494 sc->nscreens--; 495 } 496 497 static int 498 omfb_show_screen(void *v, void *cookie, int waitok, 499 void (*cb)(void *, int, int), void *cbarg) 500 { 501 502 return 0; 503 } 504