1 /* $NetBSD: if_iee_gsc.c,v 1.1 2014/02/24 07:23:43 skrll Exp $ */
2
3 /*
4 * Copyright (c) 2003 Jochen Kunz.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of Jochen Kunz may not be used to endorse or promote
16 * products derived from this software without specific prior
17 * written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY JOCHEN KUNZ
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL JOCHEN KUNZ
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * hppa GSC bus MD frontend for the iee(4) Intel i82596 Ethernet driver.
34 */
35
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: if_iee_gsc.c,v 1.1 2014/02/24 07:23:43 skrll Exp $");
38
39 /* autoconfig and device stuff */
40 #include <sys/param.h>
41 #include <sys/device.h>
42 #include <sys/conf.h>
43 #include <machine/iomod.h>
44 #include <machine/autoconf.h>
45 #include <hppa/dev/cpudevs.h>
46 #include <hppa/gsc/gscbusvar.h>
47 #include "locators.h"
48 #include "ioconf.h"
49
50 /* bus_space / bus_dma etc. */
51 #include <sys/bus.h>
52 #include <machine/intr.h>
53
54 /* general system data and functions */
55 #include <sys/systm.h>
56 #include <sys/ioctl.h>
57 #include <sys/ioccom.h>
58 #include <sys/types.h>
59
60 /* tsleep / sleep / wakeup */
61 #include <sys/proc.h>
62 /* hz for above */
63 #include <sys/kernel.h>
64
65 /* network stuff */
66 #include <net/if.h>
67 #include <net/if_dl.h>
68 #include <net/if_media.h>
69 #include <net/if_ether.h>
70 #include <sys/socket.h>
71 #include <sys/mbuf.h>
72
73 #include <dev/ic/i82596reg.h>
74 #include <dev/ic/i82596var.h>
75
76 #define IEE_GSC_IO_SZ 12
77 #define IEE_GSC_RESET 0
78 #define IEE_GSC_PORT 4
79 #define IEE_GSC_CHANATT 8
80 #define IEE_ISCP_BUSY 0x1
81
82 /* autoconfig stuff */
83 static int iee_gsc_match(device_t, cfdata_t, void *);
84 static void iee_gsc_attach(device_t, device_t, void *);
85 static int iee_gsc_detach(device_t, int);
86
87 struct iee_gsc_softc {
88 struct iee_softc iee_sc;
89 bus_space_tag_t sc_iot;
90 bus_space_handle_t sc_ioh;
91 void *sc_ih;
92 };
93
94 CFATTACH_DECL_NEW(
95 iee_gsc,
96 sizeof(struct iee_gsc_softc),
97 iee_gsc_match,
98 iee_gsc_attach,
99 iee_gsc_detach,
100 NULL
101 );
102
103 int iee_gsc_cmd(struct iee_softc *, uint32_t);
104 int iee_gsc_reset(struct iee_softc *);
105
106 int
iee_gsc_cmd(struct iee_softc * sc,uint32_t cmd)107 iee_gsc_cmd(struct iee_softc *sc, uint32_t cmd)
108 {
109 struct iee_gsc_softc *sc_gsc = (struct iee_gsc_softc *)sc;
110 int n;
111 uint16_t ack;
112
113 SC_SCB(sc)->scb_cmd = cmd;
114 IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
115 /* Issue a Channel Attention to force the chip to read the cmd. */
116 bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_CHANATT, 0);
117 /* Wait for the cmd to finish */
118 for (n = 0 ; n < 100000; n++) {
119 DELAY(1);
120 IEE_SCBSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
121 ack = SC_SCB(sc)->scb_cmd;
122 IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD);
123 if (ack == 0)
124 break;
125 }
126 if (n < 100000)
127 return 0;
128 printf("%s: iee_gsc_cmd: timeout n=%d\n", device_xname(sc->sc_dev), n);
129 return -1;
130 }
131
132 int
iee_gsc_reset(struct iee_softc * sc)133 iee_gsc_reset(struct iee_softc *sc)
134 {
135 struct iee_gsc_softc *sc_gsc = (struct iee_gsc_softc *)sc;
136 int n;
137 uint32_t cmd;
138 uint16_t ack;
139
140 /* Make sure the busy byte is set and the cache is flushed. */
141 SC_ISCP(sc)->iscp_busy = IEE_ISCP_BUSY;
142 IEE_ISCPSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
143 /* Setup the PORT Command with pointer to SCP. */
144 cmd = IEE_PORT_SCP | IEE_PHYS_SHMEM(sc->sc_scp_off);
145 /* Write a word to IEE_GSC_RESET to initiate a Hardware reset. */
146 bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_RESET, 0);
147 DELAY(1000);
148 /* Write it to the chip, it wants this in two 16 bit parts. */
149 if (sc->sc_type == I82596_CA) {
150 bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_PORT,
151 (cmd & 0xffff));
152 DELAY(1000);
153 bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_PORT,
154 (cmd >> 16));
155 } else {
156 bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_PORT,
157 (cmd >> 16));
158 DELAY(1000);
159 bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_PORT,
160 (cmd & 0xffff));
161 }
162 DELAY(1000);
163 /* Issue a Channel Attention to read SCP */
164 bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_CHANATT, 0);
165 /* Wait for the chip to initialize and read SCP and ISCP. */
166 for (n = 0 ; n < 1000; n++) {
167 IEE_ISCPSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
168 ack = SC_ISCP(sc)->iscp_busy;
169 IEE_ISCPSYNC(sc, BUS_DMASYNC_PREREAD);
170 if (ack != IEE_ISCP_BUSY)
171 break;
172 DELAY(100);
173 }
174 if (n < 1000) {
175 /* ACK interrupts we may have caused */
176 (sc->sc_iee_cmd)(sc, IEE_SCB_ACK);
177 return 0;
178 }
179 printf("%s: iee_gsc_reset timeout busy=0x%x\n",
180 device_xname(sc->sc_dev), SC_ISCP(sc)->iscp_busy);
181 return -1;
182 }
183
184 static int
iee_gsc_match(device_t parent,cfdata_t cf,void * aux)185 iee_gsc_match(device_t parent, cfdata_t cf, void *aux)
186 {
187 struct gsc_attach_args *ga = aux;
188
189 if (ga->ga_type.iodc_type == HPPA_TYPE_FIO
190 && (ga->ga_type.iodc_sv_model == HPPA_FIO_LAN
191 || ga->ga_type.iodc_sv_model == HPPA_FIO_GLAN))
192 /* beat old ie(4) i82586 driver */
193 return 10;
194 return 0;
195 }
196
197 static void
iee_gsc_attach(device_t parent,device_t self,void * aux)198 iee_gsc_attach(device_t parent, device_t self, void *aux)
199 {
200 struct iee_gsc_softc *sc_gsc = device_private(self);
201 struct iee_softc *sc = &sc_gsc->iee_sc;
202 struct gsc_attach_args *ga = aux;
203 enum hppa_cpu_type cpu_type;
204 int media[2];
205
206 sc->sc_dev = self;
207
208 if (ga->ga_type.iodc_sv_model == HPPA_FIO_LAN)
209 sc->sc_type = I82596_DX; /* ASP(2) based */
210 else
211 sc->sc_type = I82596_CA; /* LASI based */
212 /*
213 * Pre PA7100LC CPUs don't support uncacheable mappings. So make
214 * descriptors align to cache lines. Needed to avoid race conditions
215 * caused by flushing cache lines that overlap multiple descriptors.
216 */
217 cpu_type = hppa_cpu_info->hci_cputype;
218 if (cpu_type == hpcx || cpu_type == hpcxs || cpu_type == hpcxt)
219 sc->sc_cl_align = 32;
220 else
221 sc->sc_cl_align = 1;
222
223 sc_gsc->sc_iot = ga->ga_iot;
224 if (bus_space_map(sc_gsc->sc_iot, ga->ga_hpa, IEE_GSC_IO_SZ, 0,
225 &sc_gsc->sc_ioh)) {
226 aprint_error(": iee_gsc_attach: can't map I/O space\n");
227 return;
228 }
229
230 sc->sc_dmat = ga->ga_dmatag;
231
232 /* Setup SYSBUS byte. */
233 if (ga->ga_type.iodc_sv_model == HPPA_FIO_LAN) {
234 /*
235 * Some earlier machines have 82596DX Rev A1 chip
236 * which doesn't have IEE_SYSBUS_BE for 32-bit BE pointers.
237 *
238 * XXX: How can we detect chip revision at runtime?
239 * Should we check cpu_models instead?
240 * 715/50, 735/99: Rev A1? (per PR port-hp700/35531)
241 * 735/125: Rev C
242 */
243 sc->sc_sysbus = IEE_SYSBUS_INT |
244 IEE_SYSBUS_TRG | IEE_SYSBUS_LIEAR | IEE_SYSBUS_STD;
245 sc->sc_flags = IEE_NEED_SWAP | IEE_REV_A;
246 } else {
247 sc->sc_sysbus = IEE_SYSBUS_BE | IEE_SYSBUS_INT |
248 IEE_SYSBUS_TRG | IEE_SYSBUS_LIEAR | IEE_SYSBUS_STD;
249 sc->sc_flags = IEE_NEED_SWAP;
250 }
251
252 sc_gsc->sc_ih = hppa_intr_establish(IPL_NET, iee_intr, sc,
253 ga->ga_ir, ga->ga_irq);
254
255 sc->sc_iee_reset = iee_gsc_reset;
256 sc->sc_iee_cmd = iee_gsc_cmd;
257 sc->sc_mediachange = NULL;
258 sc->sc_mediastatus = NULL;
259
260 media[0] = IFM_ETHER | IFM_MANUAL;
261 media[1] = IFM_ETHER | IFM_AUTO;
262 iee_attach(sc, ga->ga_ether_address, media, 2, IFM_ETHER | IFM_AUTO);
263 }
264
265 int
iee_gsc_detach(device_t self,int flags)266 iee_gsc_detach(device_t self, int flags)
267 {
268 struct iee_gsc_softc *sc_gsc = device_private(self);
269 struct iee_softc *sc = &sc_gsc->iee_sc;
270
271 iee_detach(sc, flags);
272 bus_space_unmap(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_IO_SZ);
273 /* There is no hppa_intr_disestablish()! */
274 return 0;
275 }
276