xref: /netbsd-src/sys/arch/hppa/dev/sti_sgc.c (revision 1f8a7992727fab0fe9097807c4bb83208b7c8ebf)
1 /*	$NetBSD: sti_sgc.c,v 1.3 2021/07/11 13:36:02 tsutsui Exp $	*/
2 
3 /*	$OpenBSD: sti_sgc.c,v 1.38 2009/02/06 22:51:04 miod Exp $	*/
4 
5 /*
6  * Copyright (c) 2000-2003 Michael Shalayeff
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
22  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
27  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28  * THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 /*
31  * These cards has to be known to work so far:
32  *	- HPA1991AGrayscale rev 0.02	(705/35) (byte-wide)
33  *	- HPA1991AC19       rev 0.02	(715/33) (byte-wide)
34  *	- HPA208LC1280      rev 8.04	(712/80) just works
35  */
36 
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.3 2021/07/11 13:36:02 tsutsui Exp $");
39 
40 #include "opt_cputype.h"
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/device.h>
45 
46 #include <uvm/uvm.h>
47 
48 #include <sys/bus.h>
49 #include <machine/cpu.h>
50 #include <machine/iomod.h>
51 #include <machine/autoconf.h>
52 
53 #include <dev/wscons/wsdisplayvar.h>
54 #include <dev/wscons/wsconsio.h>
55 
56 #include <dev/ic/stireg.h>
57 #include <dev/ic/stivar.h>
58 
59 #include <hppa/dev/cpudevs.h>
60 #include <hppa/hppa/machdep.h>
61 
62 #ifdef STIDEBUG
63 #define	DPRINTF(s)	do {	\
64 	if (stidebug)		\
65 		printf s;	\
66 } while(0)
67 
68 extern int stidebug;
69 #else
70 #define	DPRINTF(s)	/* */
71 #endif
72 
73 #define	STI_ROMSIZE	(sizeof(struct sti_dd) * 4)
74 #define	STI_ID_FDDI	0x280b31af	/* Medusa FDDI ROM id */
75 
76 /*
77  * hpa addresses to check on-board variants
78  * XXX should check via device_register(9)?
79  *
80  * 0xf4000000: HPA1991AC19 on 715/33, 715/50
81  * 0xf8000000: HPA1439A on 735/99, HPA208LCxxx on 715/80, 715/100, 712
82  */
83 #define	STI_ONBOARD_HPA0	0xf4000000
84 #define	STI_ONBOARD_HPA1	0xf8000000
85 
86 /* gecko optional graphics */
87 #define	STI_GOPT1_REV	0x17
88 #define	STI_GOPT2_REV	0x70
89 #define	STI_GOPT3_REV	0xd0
90 #define	STI_GOPT4_REV	0x00
91 #define	STI_GOPT5_REV	0x20
92 #define	STI_GOPT6_REV	0x40
93 #define	STI_GOPT7_REV	0x30
94 
95 const char sti_sgc_opt[] = {
96 	STI_GOPT1_REV,
97 	STI_GOPT2_REV,
98 	STI_GOPT3_REV,
99 	STI_GOPT4_REV,
100 	STI_GOPT5_REV,
101 	STI_GOPT6_REV,
102 	STI_GOPT7_REV
103 };
104 
105 int sti_sgc_probe(device_t, cfdata_t, void *);
106 void sti_sgc_attach(device_t, device_t, void *);
107 
108 void sti_sgc_end_attach(device_t);
109 
110 extern struct cfdriver sti_cd;
111 
112 CFATTACH_DECL_NEW(sti_gedoens, sizeof(struct sti_softc), sti_sgc_probe,
113     sti_sgc_attach, NULL, NULL);
114 
115 paddr_t sti_sgc_getrom(struct confargs *);
116 
117 /*
118  * Locate STI ROM.
119  * On some machines it may not be part of the HPA space.
120  */
121 paddr_t
sti_sgc_getrom(struct confargs * ca)122 sti_sgc_getrom(struct confargs *ca)
123 {
124 	paddr_t rom;
125 	int pagezero_cookie;
126 
127 	pagezero_cookie = hppa_pagezero_map();
128 	rom = PAGE0->pd_resv2[1];
129 	hppa_pagezero_unmap(pagezero_cookie);
130 
131 	if (ca->ca_type.iodc_sv_model == HPPA_FIO_GSGC &&
132 	    ca->ca_hpa != STI_ONBOARD_HPA0 &&
133 	    ca->ca_hpa != STI_ONBOARD_HPA1) {
134 		int i;
135 		for (i = sizeof(sti_sgc_opt); i--; )
136 			if (sti_sgc_opt[i] == ca->ca_type.iodc_revision)
137 				break;
138 		if (i < 0)
139 			rom = 0;
140 	}
141 
142 	if (rom < HPPA_IOBEGIN) {
143 		if (ca->ca_naddrs > 0)
144 			rom = ca->ca_addrs[0].addr;
145 		else
146 			rom = ca->ca_hpa;
147 	}
148 
149 	return rom;
150 }
151 
152 int
sti_sgc_probe(device_t parent,cfdata_t cf,void * aux)153 sti_sgc_probe(device_t parent, cfdata_t cf, void *aux)
154 {
155 	struct confargs *ca = aux;
156 	bus_space_handle_t romh;
157 	paddr_t rom;
158 	uint32_t id;
159 	u_char devtype;
160 	int rv = 0, romunmapped = 0;
161 
162 	/* due to the graphic nature of this program do probe only one */
163 	if (cf->cf_unit > sti_cd.cd_ndevs)
164 		return 0;
165 
166 	if (ca->ca_type.iodc_type != HPPA_TYPE_FIO)
167 		return 0;
168 
169 	/* these need further checking for the graphics id */
170 	if (ca->ca_type.iodc_sv_model != HPPA_FIO_GSGC &&
171 	    ca->ca_type.iodc_sv_model != HPPA_FIO_SGC)
172 		return 0;
173 
174 	rom = sti_sgc_getrom(ca);
175 	DPRINTF(("%s: hpa=%x, rom=%x\n", __func__, (uint)ca->ca_hpa,
176 	    (uint)rom));
177 
178 	/* if it does not map, probably part of the lasi space */
179 	if ((rv = bus_space_map(ca->ca_iot, rom, STI_ROMSIZE, 0, &romh))) {
180 		DPRINTF(("%s: can't map rom space (%d)\n", __func__, rv));
181 
182 		if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN) {
183 			romh = rom;
184 			romunmapped++;
185 		} else {
186 			/* in this case nobody has no freaking idea */
187 			return 0;
188 		}
189 	}
190 
191 	devtype = bus_space_read_1(ca->ca_iot, romh, 3);
192 
193 	DPRINTF(("%s: devtype=%d\n", __func__, devtype));
194 	rv = 1;
195 	switch (devtype) {
196 	case STI_DEVTYPE4:
197 		id = bus_space_read_4(ca->ca_iot, romh, STI_DEV4_DD_GRID);
198 		break;
199 	case STI_DEVTYPE1:
200 		id = (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID
201 		    +  3) << 24) |
202 		    (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID
203 		    +  7) << 16) |
204 		    (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID
205 		    + 11) <<  8) |
206 		    (bus_space_read_1(ca->ca_iot, romh, STI_DEV1_DD_GRID
207 		    + 15));
208 		break;
209 	default:
210 		DPRINTF(("%s: unknown type (%x)\n", __func__, devtype));
211 		rv = 0;
212 	}
213 
214 	if (rv &&
215 	    ca->ca_type.iodc_sv_model == HPPA_FIO_SGC && id == STI_ID_FDDI) {
216 		DPRINTF(("%s: not a graphics device\n", __func__));
217 		rv = 0;
218 	}
219 
220 	if (ca->ca_naddrs >= sizeof(ca->ca_addrs) / sizeof(ca->ca_addrs[0])) {
221 		printf("sti: address list overflow\n");
222 		return 0;
223 	}
224 
225 	ca->ca_addrs[ca->ca_naddrs].addr = rom;
226 	ca->ca_addrs[ca->ca_naddrs].size = sti_rom_size(ca->ca_iot, romh);
227 	ca->ca_naddrs++;
228 
229 	if (!romunmapped)
230 		bus_space_unmap(ca->ca_iot, romh, STI_ROMSIZE);
231 	return rv;
232 }
233 
234 void
sti_sgc_attach(device_t parent,device_t self,void * aux)235 sti_sgc_attach(device_t parent, device_t self, void *aux)
236 {
237 	struct sti_softc *sc = device_private(self);
238 	struct confargs *ca = aux;
239 	bus_space_handle_t romh;
240 	hppa_hpa_t consaddr;
241 	int pagezero_cookie;
242 	paddr_t rom;
243 	uint32_t romlen;
244 	int rv;
245 	int i;
246 
247 	pagezero_cookie = hppa_pagezero_map();
248 	consaddr = (hppa_hpa_t)PAGE0->mem_cons.pz_hpa;
249 	hppa_pagezero_unmap(pagezero_cookie);
250 
251 	sc->sc_dev = self;
252 	sc->sc_enable_rom = NULL;
253 	sc->sc_disable_rom = NULL;
254 
255 	/* we stashed rom addr/len into the last slot during probe */
256 	rom = ca->ca_addrs[ca->ca_naddrs - 1].addr;
257 	romlen = ca->ca_addrs[ca->ca_naddrs - 1].size;
258 
259 	if ((rv = bus_space_map(ca->ca_iot, rom, romlen, 0, &romh))) {
260 		if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN)
261 			romh = rom;
262 		else {
263 			aprint_error(": can't map rom space (%d)\n", rv);
264 			return;
265 		}
266 	}
267 
268 	sc->bases[0] = romh;
269 	for (i = 1; i < STI_REGION_MAX; i++)
270 		sc->bases[i] = ca->ca_hpa;
271 
272 #ifdef HP7300LC_CPU
273 	/*
274 	 * PCXL2: enable accel I/O for this space, see PCX-L2 ERS "ACCEL_IO".
275 	 * "pcxl2_ers.{ps,pdf}", (section / chapter . rel. page / abs. page)
276 	 * 8.7.4 / 8-12 / 92, 11.3.14 / 11-14 / 122 and 14.8 / 14-5 / 203.
277 	 */
278 	if (hppa_cpu_info->hci_cputype == hpcxl2
279 	    && ca->ca_hpa >= PCXL2_ACCEL_IO_START
280 	    && ca->ca_hpa <= PCXL2_ACCEL_IO_END)
281 		eaio_l2(PCXL2_ACCEL_IO_ADDR2MASK(ca->ca_hpa));
282 #endif /* HP7300LC_CPU */
283 
284 	if (ca->ca_hpa == consaddr)
285 		sc->sc_flags |= STI_CONSOLE;
286 	if (sti_attach_common(sc, ca->ca_iot, ca->ca_iot, romh,
287 	   STI_CODEBASE_PA) == 0)
288 		config_interrupts(self, sti_sgc_end_attach);
289 }
290 
291 void
sti_sgc_end_attach(device_t dev)292 sti_sgc_end_attach(device_t dev)
293 {
294 	struct sti_softc *sc = device_private(dev);
295 
296 	sti_end_attach(sc);
297 }
298