1 /* $NetBSD: pfckbd.c,v 1.33 2023/06/01 20:15:16 andvar Exp $ */
2
3 /*-
4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Matrix scan keyboard connected to SH7709, SH7709A PFC module.
34 * currently, HP Jornada 680/690, HITACHI PERSONA HPW-50PAD only.
35 */
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: pfckbd.c,v 1.33 2023/06/01 20:15:16 andvar Exp $");
38
39 #include "debug_hpcsh.h"
40
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/device.h>
44 #include <sys/callout.h>
45 #include <sys/bus.h>
46
47 #include <machine/platid.h>
48 #include <machine/platid_mask.h>
49
50 #include <dev/hpc/hpckbdvar.h>
51
52 #include <sh3/pfcreg.h>
53
54 #include <hpcsh/dev/pfckbdvar.h>
55
56 #ifdef PFCKBD_DEBUG
57 #define DPRINTF_ENABLE
58 #define DPRINTF_DEBUG pfckbd_debug
59 #endif
60 #include <machine/debug.h>
61
62 static struct pfckbd_core {
63 int pc_attached;
64 int pc_enabled;
65 struct callout pc_soft_ch;
66 struct hpckbd_ic_if pc_if;
67 struct hpckbd_if *pc_hpckbd;
68 uint16_t pc_column[8];
69 void (*pc_callout)(struct pfckbd_core *);
70 } pfckbd_core;
71
72 static int pfckbd_match(device_t, cfdata_t, void *);
73 static void pfckbd_attach(device_t, device_t, void *);
74
75 CFATTACH_DECL_NEW(pfckbd, 0,
76 pfckbd_match, pfckbd_attach, NULL, NULL);
77
78 static void pfckbd_ifsetup(struct pfckbd_core *);
79
80 /* callbacks for hpckbd */
81 static int pfckbd_input_establish(void *, struct hpckbd_if *);
82 static int pfckbd_poll(void *);
83
84 static void pfckbd_input(struct pfckbd_core *, int, uint16_t);
85
86 static void (*pfckbd_callout_lookup(void))(struct pfckbd_core *);
87 static void pfckbd_callout(void *);
88 static void pfckbd_callout_hp(struct pfckbd_core *);
89 static void pfckbd_callout_hitachi(struct pfckbd_core *);
90 void pfckbd_poll_hitachi_power(void);
91
92
93 /* callout function table. this function is platform specific. */
94 static const struct {
95 platid_mask_t *platform;
96 void (*func)(struct pfckbd_core *);
97 } pfckbd_calloutfunc_table[] = {
98 { &platid_mask_MACH_HP , pfckbd_callout_hp },
99 { &platid_mask_MACH_HITACHI , pfckbd_callout_hitachi }
100 };
101
102
103 void
pfckbd_cnattach(void)104 pfckbd_cnattach(void)
105 {
106 struct pfckbd_core *pc = &pfckbd_core;
107
108 if ((cpu_product != CPU_PRODUCT_7709)
109 && (cpu_product != CPU_PRODUCT_7709A))
110 return;
111
112 /* initialize interface */
113 pfckbd_ifsetup(pc);
114
115 /* attach descendants */
116 hpckbd_cnattach(&pc->pc_if);
117 }
118
119 static int
pfckbd_match(device_t parent,cfdata_t cf,void * aux)120 pfckbd_match(device_t parent, cfdata_t cf, void *aux)
121 {
122
123 if ((cpu_product != CPU_PRODUCT_7709)
124 && (cpu_product != CPU_PRODUCT_7709A))
125 return 0;
126
127 return !pfckbd_core.pc_attached; /* attach only once */
128 }
129
130 static void
pfckbd_attach(device_t parent,device_t self,void * aux)131 pfckbd_attach(device_t parent, device_t self, void *aux)
132 {
133 struct hpckbd_attach_args haa;
134
135 aprint_naive("\n");
136 aprint_normal("\n");
137
138 pfckbd_core.pc_attached = 1;
139
140 pfckbd_ifsetup(&pfckbd_core);
141
142 /* attach hpckbd */
143 haa.haa_ic = &pfckbd_core.pc_if; /* tell hpckbd our interface */
144 config_found(self, &haa, hpckbd_print, CFARGS_NONE);
145
146 /* install callout handler */
147 if (pfckbd_core.pc_callout != NULL) {
148 callout_init(&pfckbd_core.pc_soft_ch, 0);
149 callout_reset(&pfckbd_core.pc_soft_ch, 1,
150 pfckbd_callout, &pfckbd_core);
151 }
152 else
153 aprint_error_dev(self, "unsupported platform\n");
154
155 if (!pmf_device_register(self, NULL, NULL))
156 aprint_error_dev(self, "unable to establish power handler\n");
157 }
158
159 static void
pfckbd_ifsetup(struct pfckbd_core * pc)160 pfckbd_ifsetup(struct pfckbd_core *pc)
161 {
162 int i;
163
164 pc->pc_if.hii_ctx = pc;
165 pc->pc_if.hii_establish = pfckbd_input_establish;
166 pc->pc_if.hii_poll = pfckbd_poll;
167
168 for (i = 0; i < 8; i++)
169 pc->pc_column[i] = 0xdfff;
170
171 /* select PFC access method */
172 pc->pc_callout = pfckbd_callout_lookup();
173 }
174
175
176 /*
177 * Callback for hpckbd_initif
178 */
179 static int
pfckbd_input_establish(void * ic,struct hpckbd_if * kbdif)180 pfckbd_input_establish(void *ic, struct hpckbd_if *kbdif)
181 {
182 struct pfckbd_core *pc = ic;
183
184 pc->pc_hpckbd = kbdif; /* save hpckbd interface */
185 pc->pc_enabled = 1; /* ok to talk to hpckbd */
186
187 return 0;
188 }
189
190 /*
191 * Callback for hpckbd_cngetc
192 */
193 static int
pfckbd_poll(void * ic)194 pfckbd_poll(void *ic)
195 {
196 struct pfckbd_core *pc = ic;
197
198 if (pc->pc_enabled && pc->pc_callout != NULL)
199 (*pc->pc_callout)(pc);
200
201 return 0;
202 }
203
204 static void
pfckbd_callout(void * arg)205 pfckbd_callout(void *arg)
206 {
207 struct pfckbd_core *pc = arg;
208
209 (*pc->pc_callout)(pc);
210 callout_schedule(&pc->pc_soft_ch, 1);
211 }
212
213
214 /*
215 * Called by platform specific scan routines to report key events to hpckbd
216 */
217 static void
pfckbd_input(struct pfckbd_core * pc,int column,uint16_t data)218 pfckbd_input(struct pfckbd_core *pc, int column, uint16_t data)
219 {
220 int row, type, val;
221 unsigned int edge, mask;
222
223 edge = data ^ pc->pc_column[column];
224 if (edge == 0)
225 return; /* no changes in this column */
226
227 pc->pc_column[column] = data;
228
229 for (row = 0, mask = 1; row < 16; ++row, mask <<= 1) {
230 if (mask & edge) {
231 type = mask & data ? /* up */ 0 : /* down */ 1;
232 DPRINTF("(%2d, %2d) %d \n", row, column, type);
233
234 val = row * 8 + column;
235 hpckbd_input(pc->pc_hpckbd, type, val);
236 }
237 }
238 }
239
240
241 /*
242 * Platform dependent scan routines.
243 */
244
245 /* Look up appropriate callback handler */
246 static void
pfckbd_callout_lookup(void)247 (*pfckbd_callout_lookup(void))(struct pfckbd_core *)
248 {
249 int i, n;
250
251 n = sizeof(pfckbd_calloutfunc_table)
252 / sizeof(pfckbd_calloutfunc_table[0]);
253
254 for (i = 0; i < n; i++)
255 if (platid_match(&platid,
256 pfckbd_calloutfunc_table[i].platform))
257 return pfckbd_calloutfunc_table[i].func;
258
259 return NULL;
260 }
261
262 /*
263 * HP Jornada680/690, HP620LX
264 */
265 static void
pfckbd_callout_hp(struct pfckbd_core * pc)266 pfckbd_callout_hp(struct pfckbd_core *pc)
267 {
268 #define PFCKBD_HP_PDCR_MASK 0xcc0c
269 #define PFCKBD_HP_PECR_MASK 0xf0cf
270
271 /*
272 * Disable output on all lines but the n'th line in D.
273 * Pull the n'th scan line in D low.
274 */
275 #define PD(n) \
276 { (uint16_t)(PFCKBD_HP_PDCR_MASK & (~(1 << (2*(n)+1)))), \
277 (uint16_t)(PFCKBD_HP_PECR_MASK & 0xffff), \
278 (uint8_t)~(1 << (n)), \
279 0xff }
280
281 /* Ditto for E */
282 #define PE(n) \
283 { (uint16_t)(PFCKBD_HP_PDCR_MASK & 0xffff), \
284 (uint16_t)(PFCKBD_HP_PECR_MASK & (~(1 << (2*(n)+1)))), \
285 0xff, \
286 (uint8_t)~(1 << (n)) }
287
288 static const struct {
289 uint16_t dc, ec; uint8_t d, e;
290 } scan[] = {
291 PD(1), PD(5), PE(1), PE(6), PE(7), PE(3), PE(0), PD(7)
292 };
293
294 #undef PD
295 #undef PE
296
297 uint16_t dc, ec;
298 int column;
299 uint16_t data;
300
301 if (!pc->pc_enabled)
302 return;
303
304 /* bits in D/E control regs we do not touch (XXX: can they change?) */
305 dc = _reg_read_2(SH7709_PDCR) & ~PFCKBD_HP_PDCR_MASK;
306 ec = _reg_read_2(SH7709_PECR) & ~PFCKBD_HP_PECR_MASK;
307
308 for (column = 0; column < 8; column++) {
309 /* disable output to all lines except the one we scan */
310 _reg_write_2(SH7709_PDCR, dc | scan[column].dc);
311 _reg_write_2(SH7709_PECR, ec | scan[column].ec);
312 delay(5);
313
314 /* pull the scan line low */
315 _reg_write_1(SH7709_PDDR, scan[column].d);
316 _reg_write_1(SH7709_PEDR, scan[column].e);
317 delay(50);
318
319 /* read sense */
320 data = _reg_read_1(SH7709_PFDR)
321 | (_reg_read_1(SH7709_PCDR) << 8);
322
323 pfckbd_input(pc, column, data);
324 }
325
326 /* scan no lines */
327 _reg_write_1(SH7709_PDDR, 0xff);
328 _reg_write_1(SH7709_PEDR, 0xff);
329
330 /* enable all scan lines */
331 _reg_write_2(SH7709_PDCR, dc | (0x5555 & PFCKBD_HP_PDCR_MASK));
332 _reg_write_2(SH7709_PECR, ec | (0x5555 & PFCKBD_HP_PECR_MASK));
333
334 #if 0
335 /* (ignore) extra keys/events (recorder buttons, lid, cable &c) */
336 data = _reg_read_1(SH7709_PGDR) | (_reg_read_1(SH7709_PHDR) << 8);
337 #endif
338 }
339
340 /*
341 * HITACH PERSONA (HPW-50PAD)
342 */
343 static void
pfckbd_callout_hitachi(struct pfckbd_core * pc)344 pfckbd_callout_hitachi(struct pfckbd_core *pc)
345 {
346 #define PFCKBD_HITACHI_PCCR_MASK 0xfff3
347 #define PFCKBD_HITACHI_PDCR_MASK 0x000c
348 #define PFCKBD_HITACHI_PECR_MASK 0x30cf
349
350 #define PFCKBD_HITACHI_PCDR_SCN_MASK 0xfd
351 #define PFCKBD_HITACHI_PDDR_SCN_MASK 0x02
352 #define PFCKBD_HITACHI_PEDR_SCN_MASK 0x4b
353
354 #define PFCKBD_HITACHI_PCDR_SNS_MASK 0x01
355 #define PFCKBD_HITACHI_PFDR_SNS_MASK 0xfe
356
357 /*
358 * Disable output on all lines but the n'th line in C.
359 * Pull the n'th scan line in C low.
360 */
361 #define PC(n) \
362 { (uint16_t)(PFCKBD_HITACHI_PCCR_MASK & (~(1 << (2*(n)+1)))), \
363 (uint16_t)(PFCKBD_HITACHI_PDCR_MASK & 0xffff), \
364 (uint16_t)(PFCKBD_HITACHI_PECR_MASK & 0xffff), \
365 (uint8_t)(PFCKBD_HITACHI_PCDR_SCN_MASK & ~(1 << (n))), \
366 PFCKBD_HITACHI_PDDR_SCN_MASK, \
367 PFCKBD_HITACHI_PEDR_SCN_MASK }
368
369 /* Ditto for D */
370 #define PD(n) \
371 { (uint16_t)(PFCKBD_HITACHI_PCCR_MASK & 0xffff), \
372 (uint16_t)(PFCKBD_HITACHI_PDCR_MASK & (~(1 << (2*(n)+1)))), \
373 (uint16_t)(PFCKBD_HITACHI_PECR_MASK & 0xffff), \
374 PFCKBD_HITACHI_PCDR_SCN_MASK, \
375 (uint8_t)(PFCKBD_HITACHI_PDDR_SCN_MASK & ~(1 << (n))), \
376 PFCKBD_HITACHI_PEDR_SCN_MASK }
377
378 /* Ditto for E */
379 #define PE(n) \
380 { (uint16_t)(PFCKBD_HITACHI_PCCR_MASK & 0xffff), \
381 (uint16_t)(PFCKBD_HITACHI_PDCR_MASK & 0xffff), \
382 (uint16_t)(PFCKBD_HITACHI_PECR_MASK & (~(1 << (2*(n)+1)))), \
383 PFCKBD_HITACHI_PCDR_SCN_MASK, \
384 PFCKBD_HITACHI_PDDR_SCN_MASK, \
385 (uint8_t)(PFCKBD_HITACHI_PEDR_SCN_MASK & ~(1 << (n))) }
386
387 static const struct {
388 uint16_t cc, dc, ec; uint8_t c, d, e;
389 } scan[] = {
390 PE(6), PE(3), PE(1), PE(0), PC(7), PC(6), PC(5), PC(4),
391 PC(3), PC(2), PD(1), PC(0)
392 };
393
394 uint16_t cc, dc, ec;
395 uint8_t data[2], cd, dd, ed;
396 int i;
397
398 if (!pc->pc_enabled)
399 return;
400
401 /* bits in C/D/E control regs we do not touch (XXX: can they change?) */
402 cc = _reg_read_2(SH7709_PCCR) & ~PFCKBD_HITACHI_PCCR_MASK;
403 dc = _reg_read_2(SH7709_PDCR) & ~PFCKBD_HITACHI_PDCR_MASK;
404 ec = _reg_read_2(SH7709_PECR) & ~PFCKBD_HITACHI_PECR_MASK;
405
406 for (i = 0; i < 12; i++) {
407 /* disable output to all lines except the one we scan */
408 _reg_write_2(SH7709_PCCR, cc | scan[i].cc);
409 _reg_write_2(SH7709_PDCR, dc | scan[i].dc);
410 _reg_write_2(SH7709_PECR, ec | scan[i].ec);
411 delay(5);
412
413 cd = _reg_read_1(SH7709_PCDR) & ~PFCKBD_HITACHI_PCDR_SCN_MASK;
414 dd = _reg_read_1(SH7709_PDDR) & ~PFCKBD_HITACHI_PDDR_SCN_MASK;
415 ed = _reg_read_1(SH7709_PEDR) & ~PFCKBD_HITACHI_PEDR_SCN_MASK;
416
417 /* pull the scan line low */
418 _reg_write_1(SH7709_PCDR, cd | scan[i].c);
419 _reg_write_1(SH7709_PDDR, dd | scan[i].d);
420 _reg_write_1(SH7709_PEDR, ed | scan[i].e);
421 delay(50);
422
423 /* read sense */
424 data[i & 0x1] =
425 (_reg_read_1(SH7709_PCDR) & PFCKBD_HITACHI_PCDR_SNS_MASK)
426 | (_reg_read_1(SH7709_PFDR) & PFCKBD_HITACHI_PFDR_SNS_MASK);
427
428 if (i & 0x1)
429 pfckbd_input(pc, (i >> 1), (data[0] | (data[1] << 8)));
430 }
431
432 /* enable all scan lines */
433 _reg_write_2(SH7709_PCCR, cc | (0x5555 & PFCKBD_HITACHI_PCCR_MASK));
434 _reg_write_2(SH7709_PDCR, dc | (0x5555 & PFCKBD_HITACHI_PDCR_MASK));
435 _reg_write_2(SH7709_PECR, ec | (0x5555 & PFCKBD_HITACHI_PECR_MASK));
436 }
437
438 void
pfckbd_poll_hitachi_power(void)439 pfckbd_poll_hitachi_power(void)
440 {
441 static const struct {
442 uint16_t cc, dc, ec; uint8_t c, d, e;
443 } poll = PD(1);
444
445 #undef PC
446 #undef PD
447 #undef PE
448
449 uint16_t cc, dc, ec;
450 uint8_t cd, dd, ed;
451
452 /* bits in C/D/E control regs we do not touch (XXX: can they change?) */
453 cc = _reg_read_2(SH7709_PCCR) & ~PFCKBD_HITACHI_PCCR_MASK;
454 dc = _reg_read_2(SH7709_PDCR) & ~PFCKBD_HITACHI_PDCR_MASK;
455 ec = _reg_read_2(SH7709_PECR) & ~PFCKBD_HITACHI_PECR_MASK;
456
457 /* disable output to all lines except the one we scan */
458 _reg_write_2(SH7709_PCCR, cc | poll.cc);
459 _reg_write_2(SH7709_PDCR, dc | poll.dc);
460 _reg_write_2(SH7709_PECR, ec | poll.ec);
461 delay(5);
462
463 cd = _reg_read_1(SH7709_PCDR) & ~PFCKBD_HITACHI_PCDR_SCN_MASK;
464 dd = _reg_read_1(SH7709_PDDR) & ~PFCKBD_HITACHI_PDDR_SCN_MASK;
465 ed = _reg_read_1(SH7709_PEDR) & ~PFCKBD_HITACHI_PEDR_SCN_MASK;
466
467 /* pull the scan line low */
468 _reg_write_1(SH7709_PCDR, cd | poll.c);
469 _reg_write_1(SH7709_PDDR, dd | poll.d);
470 _reg_write_1(SH7709_PEDR, ed | poll.e);
471 delay(50);
472
473 /* poll POWER On */
474 while (_reg_read_1(SH7709_PCDR) & PFCKBD_HITACHI_PCDR_SNS_MASK & 0x01);
475
476 /* enable all scan lines */
477 _reg_write_2(SH7709_PCCR, cc | (0x5555 & PFCKBD_HITACHI_PCCR_MASK));
478 _reg_write_2(SH7709_PDCR, dc | (0x5555 & PFCKBD_HITACHI_PDCR_MASK));
479 _reg_write_2(SH7709_PECR, ec | (0x5555 & PFCKBD_HITACHI_PECR_MASK));
480 }
481