1 /* $NetBSD: vrpciu.c,v 1.6 2002/01/27 14:18:13 takemura Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 Enami Tsugutomo. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/device.h> 32 33 #include <machine/bus.h> 34 #include <machine/bus_space_hpcmips.h> 35 #include <machine/bus_dma_hpcmips.h> 36 #include <machine/config_hook.h> 37 #include <machine/platid.h> 38 #include <machine/platid_mask.h> 39 40 #include <dev/pci/pcivar.h> 41 #include <dev/pci/pcidevs.h> 42 #include <dev/pci/pciidereg.h> 43 44 #include <hpcmips/vr/icureg.h> 45 #include <hpcmips/vr/vripif.h> 46 #include <hpcmips/vr/vrpciureg.h> 47 48 #include "pci.h" 49 50 #ifdef DEBUG 51 #define DPRINTF(args) printf args 52 #else 53 #define DPRINTF(args) 54 #endif 55 56 struct vrpciu_softc { 57 struct device sc_dev; 58 59 vrip_chipset_tag_t sc_vc; 60 bus_space_tag_t sc_iot; 61 bus_space_handle_t sc_ioh; 62 void *sc_ih; 63 64 struct vrc4173bcu_softc *sc_bcu; /* vrc4173bcu */ 65 66 struct hpcmips_pci_chipset sc_pc; 67 }; 68 69 static void vrpciu_write(struct vrpciu_softc *, int, u_int32_t); 70 static u_int32_t 71 vrpciu_read(struct vrpciu_softc *, int); 72 #ifdef DEBUG 73 static void vrpciu_write_2(struct vrpciu_softc *, int, u_int16_t) 74 __attribute__((unused)); 75 static u_int16_t 76 vrpciu_read_2(struct vrpciu_softc *, int); 77 #endif 78 static int vrpciu_match(struct device *, struct cfdata *, void *); 79 static void vrpciu_attach(struct device *, struct device *, void *); 80 #if NPCI > 0 81 static int vrpciu_print(void *, const char *); 82 #endif 83 static int vrpciu_intr(void *); 84 static void vrpciu_attach_hook(struct device *, struct device *, 85 struct pcibus_attach_args *); 86 static int vrpciu_bus_maxdevs(pci_chipset_tag_t, int); 87 static int vrpciu_bus_devorder(pci_chipset_tag_t, int, char *); 88 static pcitag_t vrpciu_make_tag(pci_chipset_tag_t, int, int, int); 89 static void vrpciu_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *, 90 int *); 91 static pcireg_t vrpciu_conf_read(pci_chipset_tag_t, pcitag_t, int); 92 static void vrpciu_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 93 static int vrpciu_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 94 static const char *vrpciu_intr_string(pci_chipset_tag_t, pci_intr_handle_t); 95 static const struct evcnt *vrpciu_intr_evcnt(pci_chipset_tag_t, 96 pci_intr_handle_t); 97 static void *vrpciu_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, 98 int, int (*)(void *), void *); 99 static void vrpciu_intr_disestablish(pci_chipset_tag_t, void *); 100 101 struct cfattach vrpciu_ca = { 102 sizeof(struct vrpciu_softc), vrpciu_match, vrpciu_attach 103 }; 104 105 static void 106 vrpciu_write(struct vrpciu_softc *sc, int offset, u_int32_t val) 107 { 108 109 bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val); 110 } 111 112 static u_int32_t 113 vrpciu_read(struct vrpciu_softc *sc, int offset) 114 { 115 116 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset)); 117 } 118 119 #ifdef DEBUG 120 static void 121 vrpciu_write_2(struct vrpciu_softc *sc, int offset, u_int16_t val) 122 { 123 124 bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, val); 125 } 126 127 static u_int16_t 128 vrpciu_read_2(struct vrpciu_softc *sc, int offset) 129 { 130 131 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset)); 132 } 133 #endif 134 135 static int 136 vrpciu_match(struct device *parent, struct cfdata *match, void *aux) 137 { 138 139 return (1); 140 } 141 142 static void 143 vrpciu_attach(struct device *parent, struct device *self, void *aux) 144 { 145 struct vrpciu_softc *sc = (struct vrpciu_softc *)self; 146 pci_chipset_tag_t pc = &sc->sc_pc; 147 struct vrip_attach_args *va = aux; 148 struct bus_space_tag_hpcmips *iot; 149 u_int32_t reg; 150 char tmpbuf[16]; 151 #if NPCI > 0 152 struct pcibus_attach_args pba; 153 #endif 154 155 sc->sc_vc = va->va_vc; 156 sc->sc_iot = va->va_iot; 157 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0, 158 &sc->sc_ioh)) { 159 printf(": couldn't map io space\n"); 160 return; 161 } 162 163 sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_unit, 0, IPL_TTY, 164 vrpciu_intr, sc); 165 if (sc->sc_ih == NULL) { 166 printf(": couldn't establish interrupt\n"); 167 return; 168 } 169 170 /* Enable level 2 interrupt */ 171 vrip_intr_setmask2(va->va_vc, sc->sc_ih, PCIINT_INT0, 1); 172 173 printf("\n"); 174 175 #ifdef DEBUG 176 #define DUMP_MAW(sc, name, reg) do { \ 177 printf("%s: %s =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 178 (name), (reg)); \ 179 printf("%s:\tIBA/MASK =\t0x%08x/0x%08x (0x%08x - 0x%08x)\n", \ 180 (sc)->sc_dev.dv_xname, \ 181 reg & VRPCIU_MAW_IBAMASK, VRPCIU_MAW_ADDRMASK(reg), \ 182 VRPCIU_MAW_ADDR(reg), \ 183 VRPCIU_MAW_ADDR(reg) + VRPCIU_MAW_SIZE(reg)); \ 184 printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 185 reg & VRPCIU_MAW_WINEN); \ 186 printf("%s:\tPCIADR =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 187 VRPCIU_MAW_PCIADDR(reg)); \ 188 } while (0) 189 #define DUMP_TAW(sc, name, reg) do { \ 190 printf("%s: %s =\t\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 191 (name), (reg)); \ 192 printf("%s:\tMASK =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 193 VRPCIU_TAW_ADDRMASK(reg)); \ 194 printf("%s:\tWINEN =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 195 reg & VRPCIU_TAW_WINEN); \ 196 printf("%s:\tIBA =\t0x%08x\n", (sc)->sc_dev.dv_xname, \ 197 VRPCIU_TAW_IBA(reg)); \ 198 } while (0) 199 reg = vrpciu_read(sc, VRPCIU_MMAW1REG); 200 DUMP_MAW(sc, "MMAW1", reg); 201 reg = vrpciu_read(sc, VRPCIU_MMAW2REG); 202 DUMP_MAW(sc, "MMAW2", reg); 203 reg = vrpciu_read(sc, VRPCIU_TAW1REG); 204 DUMP_TAW(sc, "TAW1", reg); 205 reg = vrpciu_read(sc, VRPCIU_TAW2REG); 206 DUMP_TAW(sc, "TAW2", reg); 207 reg = vrpciu_read(sc, VRPCIU_MIOAWREG); 208 DUMP_MAW(sc, "MIOAW", reg); 209 printf("%s: BUSERRAD =\t0x%08x\n", sc->sc_dev.dv_xname, 210 vrpciu_read(sc, VRPCIU_BUSERRADREG)); 211 printf("%s: INTCNTSTA =\t0x%08x\n", sc->sc_dev.dv_xname, 212 vrpciu_read(sc, VRPCIU_INTCNTSTAREG)); 213 printf("%s: EXACC =\t0x%08x\n", sc->sc_dev.dv_xname, 214 vrpciu_read(sc, VRPCIU_EXACCREG)); 215 printf("%s: RECONT =\t0x%08x\n", sc->sc_dev.dv_xname, 216 vrpciu_read(sc, VRPCIU_RECONTREG)); 217 printf("%s: PCIEN =\t0x%08x\n", sc->sc_dev.dv_xname, 218 vrpciu_read(sc, VRPCIU_ENREG)); 219 printf("%s: CLOCKSEL =\t0x%08x\n", sc->sc_dev.dv_xname, 220 vrpciu_read(sc, VRPCIU_CLKSELREG)); 221 printf("%s: TRDYV =\t0x%08x\n", sc->sc_dev.dv_xname, 222 vrpciu_read(sc, VRPCIU_TRDYVREG)); 223 printf("%s: CLKRUN =\t0x%08x\n", sc->sc_dev.dv_xname, 224 vrpciu_read_2(sc, VRPCIU_CLKRUNREG)); 225 printf("%s: IDREG =\t0x%08x\n", sc->sc_dev.dv_xname, 226 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_ID_REG)); 227 reg = vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG); 228 printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname, reg); 229 vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG, reg); 230 printf("%s: CSR =\t\t0x%08x\n", sc->sc_dev.dv_xname, 231 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG)); 232 printf("%s: CLASS =\t0x%08x\n", sc->sc_dev.dv_xname, 233 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_CLASS_REG)); 234 printf("%s: BHLC =\t\t0x%08x\n", sc->sc_dev.dv_xname, 235 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_BHLC_REG)); 236 printf("%s: MAIL =\t\t0x%08x\n", sc->sc_dev.dv_xname, 237 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MAILREG)); 238 printf("%s: MBA1 =\t\t0x%08x\n", sc->sc_dev.dv_xname, 239 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA1REG)); 240 printf("%s: MBA2 =\t\t0x%08x\n", sc->sc_dev.dv_xname, 241 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA2REG)); 242 printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname, 243 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG)); 244 #if 0 245 vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG, 246 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG) | 0x01); 247 printf("%s: INTR =\t\t0x%08x\n", sc->sc_dev.dv_xname, 248 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG)); 249 #endif 250 #endif 251 252 pc->pc_dev = &sc->sc_dev; 253 pc->pc_attach_hook = vrpciu_attach_hook; 254 pc->pc_bus_maxdevs = vrpciu_bus_maxdevs; 255 pc->pc_bus_devorder = vrpciu_bus_devorder; 256 pc->pc_make_tag = vrpciu_make_tag; 257 pc->pc_decompose_tag = vrpciu_decompose_tag; 258 pc->pc_conf_read = vrpciu_conf_read; 259 pc->pc_conf_write = vrpciu_conf_write; 260 pc->pc_intr_map = vrpciu_intr_map; 261 pc->pc_intr_string = vrpciu_intr_string; 262 pc->pc_intr_evcnt = vrpciu_intr_evcnt; 263 pc->pc_intr_establish = vrpciu_intr_establish; 264 pc->pc_intr_disestablish = vrpciu_intr_disestablish; 265 266 #if 0 267 { 268 int i; 269 270 for (i = 0; i < 8; i++) 271 printf("%s: ID_REG(0, 0, %d) = 0x%08x\n", 272 sc->sc_dev.dv_xname, i, 273 pci_conf_read(pc, pci_make_tag(pc, 0, 0, i), 274 PCI_ID_REG)); 275 } 276 #endif 277 278 #if NPCI > 0 279 memset(&pba, 0, sizeof(pba)); 280 pba.pba_busname = "pci"; 281 282 /* For now, just inherit window mappings set by WinCE. XXX. */ 283 284 iot = hpcmips_alloc_bus_space_tag(); 285 reg = vrpciu_read(sc, VRPCIU_MIOAWREG); 286 snprintf(tmpbuf, sizeof(tmpbuf), "%s/iot", 287 sc->sc_dev.dv_xname); 288 hpcmips_init_bus_space(iot, (struct bus_space_tag_hpcmips *)sc->sc_iot, 289 tmpbuf, VRPCIU_MAW_ADDR(reg), VRPCIU_MAW_SIZE(reg)); 290 pba.pba_iot = &iot->bst; 291 292 /* 293 * Just use system bus space tag. It works since WinCE maps 294 * PCI bus space at same offset. But this isn't right thing 295 * of course. XXX. 296 */ 297 pba.pba_memt = sc->sc_iot; 298 pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt; 299 pba.pba_bus = 0; 300 301 if (platid_match(&platid, &platid_mask_MACH_LASER5_L_BOARD)) { 302 /* 303 * fix PCI device configration for L-Router. 304 */ 305 /* change IDE controller to native mode */ 306 reg = pci_conf_read(pc, pci_make_tag(pc, 0, 16, 0), 307 PCI_CLASS_REG); 308 reg |= PCIIDE_INTERFACE_PCI(0) << PCI_INTERFACE_SHIFT; 309 reg |= PCIIDE_INTERFACE_PCI(1) << PCI_INTERFACE_SHIFT; 310 pci_conf_write(pc, pci_make_tag(pc, 0, 16, 0), PCI_CLASS_REG, 311 reg); 312 /* fix broken BAR setting of fxp0, fxp1 */ 313 pci_conf_write(pc, pci_make_tag(pc, 0, 0, 0), PCI_MAPREG_START, 314 0x11100000); 315 pci_conf_write(pc, pci_make_tag(pc, 0, 1, 0), PCI_MAPREG_START, 316 0x11200000); 317 } 318 319 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 320 PCI_FLAGS_MRL_OKAY; 321 pba.pba_pc = pc; 322 323 config_found(self, &pba, vrpciu_print); 324 #endif 325 } 326 327 #if NPCI > 0 328 static int 329 vrpciu_print(void *aux, const char *pnp) 330 { 331 struct pcibus_attach_args *pba = aux; 332 333 if (pnp != NULL) 334 printf("%s at %s", pba->pba_busname, pnp); 335 else 336 printf(" bus %d", pba->pba_bus); 337 338 return (UNCONF); 339 } 340 #endif 341 342 /* 343 * Handle PCI error interrupts. 344 */ 345 int 346 vrpciu_intr(void *arg) 347 { 348 struct vrpciu_softc *sc = (struct vrpciu_softc *)arg; 349 u_int32_t isr; 350 351 isr = vrpciu_read(sc, VRPCIU_INTCNTSTAREG); 352 printf("%s: vrpciu_intr 0x%08x\n", sc->sc_dev.dv_xname, isr); 353 return ((isr & 0x0f) ? 1 : 0); 354 } 355 356 void 357 vrpciu_attach_hook(struct device *parent, struct device *self, 358 struct pcibus_attach_args *pba) 359 { 360 361 return; 362 } 363 364 int 365 vrpciu_bus_maxdevs(pci_chipset_tag_t pc, int busno) 366 { 367 368 return (32); 369 } 370 371 int 372 vrpciu_bus_devorder(pci_chipset_tag_t pc, int busno, char *devs) 373 { 374 int i, dev; 375 char priorities[32]; 376 static pcireg_t ids[] = { 377 /* these devices should be attached first */ 378 PCI_ID_CODE(PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VRC4173_BCU), 379 }; 380 381 /* scan PCI devices and check the id table */ 382 memset(priorities, 0, sizeof(priorities)); 383 for (dev = 0; dev < 32; dev++) { 384 pcireg_t id; 385 id = pci_conf_read(pc, pci_make_tag(pc, 0, dev, 0),PCI_ID_REG); 386 for (i = 0; i < sizeof(ids)/sizeof(*ids); i++) 387 if (id == ids[i]) 388 priorities[dev] = 1; 389 } 390 391 /* fill order array */ 392 for (i = 1; 0 <= i; i--) 393 for (dev = 0; dev < 32; dev++) 394 if (priorities[dev] == i) 395 *devs++ = dev; 396 397 return (32); 398 } 399 400 pcitag_t 401 vrpciu_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) 402 { 403 404 return ((bus << 16) | (device << 11) | (function << 8)); 405 } 406 407 void 408 vrpciu_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, 409 int *fp) 410 { 411 412 if (bp != NULL) 413 *bp = (tag >> 16) & 0xff; 414 if (dp != NULL) 415 *dp = (tag >> 11) & 0x1f; 416 if (fp != NULL) 417 *fp = (tag >> 8) & 0x07; 418 } 419 420 pcireg_t 421 vrpciu_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 422 { 423 struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev; 424 u_int32_t val; 425 int bus, device, function; 426 427 pci_decompose_tag(pc, tag, &bus, &device, &function); 428 if (bus == 0) { 429 if (device > 21) 430 return ((pcitag_t)-1); 431 tag = (1 << (device + 11)) | (function << 8); /* Type 0 */ 432 } else 433 tag |= VRPCIU_CONF_TYPE1; 434 435 vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg); 436 val = vrpciu_read(sc, VRPCIU_CONFDREG); 437 #if 0 438 printf("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n", 439 sc->sc_dev.dv_xname, (u_int32_t)tag, reg, val); 440 #endif 441 return (val); 442 } 443 444 void 445 vrpciu_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, 446 pcireg_t data) 447 { 448 struct vrpciu_softc *sc = (struct vrpciu_softc *)pc->pc_dev; 449 int bus, device, function; 450 451 #if 0 452 printf("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n", 453 sc->sc_dev.dv_xname, (u_int32_t)tag, reg, (u_int32_t)data); 454 #endif 455 vrpciu_decompose_tag(pc, tag, &bus, &device, &function); 456 if (bus == 0) { 457 if (device > 21) 458 return; 459 tag = (1 << (device + 11)) | (function << 8); /* Type 0 */ 460 } else 461 tag |= VRPCIU_CONF_TYPE1; 462 463 vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg); 464 vrpciu_write(sc, VRPCIU_CONFDREG, data); 465 } 466 467 int 468 vrpciu_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 469 { 470 pci_chipset_tag_t pc = pa->pa_pc; 471 pcitag_t intrtag = pa->pa_intrtag; 472 int bus, dev, func; 473 #ifdef DEBUG 474 int line = pa->pa_intrline; 475 int pin = pa->pa_intrpin; 476 #endif 477 478 pci_decompose_tag(pc, intrtag, &bus, &dev, &func); 479 DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", pc->pc_dev->dv_xname, 480 bus, dev, func, line, pin)); 481 482 *ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func); 483 484 return (0); 485 } 486 487 const char * 488 vrpciu_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 489 { 490 static char irqstr[sizeof("pciintr") + 16]; 491 492 snprintf(irqstr, sizeof(irqstr), "pciintr %d:%d:%d", 493 CONFIG_HOOK_PCIINTR_BUS((int)ih), 494 CONFIG_HOOK_PCIINTR_DEVICE((int)ih), 495 CONFIG_HOOK_PCIINTR_FUNCTION((int)ih)); 496 497 return (irqstr); 498 } 499 500 const struct evcnt * 501 vrpciu_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 502 { 503 504 /* XXX for now, no evcnt parent reported */ 505 506 return (NULL); 507 } 508 509 void * 510 vrpciu_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 511 int (*func)(void *), void *arg) 512 { 513 514 if (ih == -1) 515 return (NULL); 516 DPRINTF(("vrpciu_intr_establish: %p\n", sc)); 517 518 return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE, 519 (int (*)(void *, int, long, void *))func, arg)); 520 } 521 522 void 523 vrpciu_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 524 { 525 526 DPRINTF(("vrpciu_intr_disestablish: %p\n", sc)); 527 config_unhook(cookie); 528 } 529