1 /* $NetBSD: vrpciu.c,v 1.24 2021/08/07 16:18:54 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2001 Enami Tsugutomo.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: vrpciu.c,v 1.24 2021/08/07 16:18:54 thorpej Exp $");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/device.h>
35
36 #include <machine/bus.h>
37 #include <machine/bus_space_hpcmips.h>
38 #include <machine/bus_dma_hpcmips.h>
39 #include <machine/config_hook.h>
40 #include <machine/platid.h>
41 #include <machine/platid_mask.h>
42
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcidevs.h>
45 #include <dev/pci/pciidereg.h>
46
47 #include <hpcmips/vr/icureg.h>
48 #include <hpcmips/vr/vripif.h>
49 #include <hpcmips/vr/vrpciureg.h>
50
51 #include "pci.h"
52
53 #ifdef DEBUG
54 #define DPRINTF(args) printf args
55 #else
56 #define DPRINTF(args)
57 #endif
58
59 struct vrpciu_softc {
60 device_t sc_dev;
61
62 vrip_chipset_tag_t sc_vc;
63 bus_space_tag_t sc_iot;
64 bus_space_handle_t sc_ioh;
65 void *sc_ih;
66
67 struct vrc4173bcu_softc *sc_bcu; /* vrc4173bcu */
68
69 struct hpcmips_pci_chipset sc_pc;
70 };
71
72 static void vrpciu_write(struct vrpciu_softc *, int, u_int32_t);
73 static u_int32_t
74 vrpciu_read(struct vrpciu_softc *, int);
75 #ifdef DEBUG
76 static void vrpciu_write_2(struct vrpciu_softc *, int, u_int16_t)
77 __attribute__((unused));
78 static u_int16_t
79 vrpciu_read_2(struct vrpciu_softc *, int);
80 #endif
81 static int vrpciu_match(device_t, cfdata_t, void *);
82 static void vrpciu_attach(device_t, device_t, void *);
83 static int vrpciu_intr(void *);
84 static void vrpciu_attach_hook(device_t, device_t,
85 struct pcibus_attach_args *);
86 static int vrpciu_bus_maxdevs(pci_chipset_tag_t, int);
87 static int vrpciu_bus_devorder(pci_chipset_tag_t, int, uint8_t *, int);
88 static pcitag_t vrpciu_make_tag(pci_chipset_tag_t, int, int, int);
89 static void vrpciu_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *,
90 int *);
91 static pcireg_t vrpciu_conf_read(pci_chipset_tag_t, pcitag_t, int);
92 static void vrpciu_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
93 static int vrpciu_intr_map(const struct pci_attach_args *, pci_intr_handle_t *);
94 static const char *vrpciu_intr_string(pci_chipset_tag_t, pci_intr_handle_t,
95 char *, size_t);
96 static const struct evcnt *vrpciu_intr_evcnt(pci_chipset_tag_t,
97 pci_intr_handle_t);
98 static void *vrpciu_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
99 int, int (*)(void *), void *);
100 static void vrpciu_intr_disestablish(pci_chipset_tag_t, void *);
101
102 CFATTACH_DECL_NEW(vrpciu, sizeof(struct vrpciu_softc),
103 vrpciu_match, vrpciu_attach, NULL, NULL);
104
105 static void
vrpciu_write(struct vrpciu_softc * sc,int offset,u_int32_t val)106 vrpciu_write(struct vrpciu_softc *sc, int offset, u_int32_t val)
107 {
108
109 bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val);
110 }
111
112 static u_int32_t
vrpciu_read(struct vrpciu_softc * sc,int offset)113 vrpciu_read(struct vrpciu_softc *sc, int offset)
114 {
115
116 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset));
117 }
118
119 #ifdef DEBUG
120 static void
vrpciu_write_2(struct vrpciu_softc * sc,int offset,u_int16_t val)121 vrpciu_write_2(struct vrpciu_softc *sc, int offset, u_int16_t val)
122 {
123
124 bus_space_write_2(sc->sc_iot, sc->sc_ioh, offset, val);
125 }
126
127 static u_int16_t
vrpciu_read_2(struct vrpciu_softc * sc,int offset)128 vrpciu_read_2(struct vrpciu_softc *sc, int offset)
129 {
130
131 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, offset));
132 }
133 #endif
134
135 static int
vrpciu_match(device_t parent,cfdata_t match,void * aux)136 vrpciu_match(device_t parent, cfdata_t match, void *aux)
137 {
138
139 return (1);
140 }
141
142 static void
vrpciu_attach(device_t parent,device_t self,void * aux)143 vrpciu_attach(device_t parent, device_t self, void *aux)
144 {
145 struct vrpciu_softc *sc = device_private(self);
146 pci_chipset_tag_t pc = &sc->sc_pc;
147 struct vrip_attach_args *va = aux;
148 #if defined(DEBUG) || NPCI > 0
149 u_int32_t reg;
150 #endif
151 #if NPCI > 0
152 struct bus_space_tag_hpcmips *iot;
153 char tmpbuf[16];
154 struct pcibus_attach_args pba;
155 #endif
156
157 sc->sc_dev = self;
158 sc->sc_vc = va->va_vc;
159 sc->sc_iot = va->va_iot;
160 if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size, 0,
161 &sc->sc_ioh)) {
162 printf(": couldn't map io space\n");
163 return;
164 }
165
166 sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_unit, 0, IPL_TTY,
167 vrpciu_intr, sc);
168 if (sc->sc_ih == NULL) {
169 printf(": couldn't establish interrupt\n");
170 return;
171 }
172
173 /* Enable level 2 interrupt */
174 vrip_intr_setmask2(va->va_vc, sc->sc_ih, PCIINT_INT0, 1);
175
176 printf("\n");
177
178 #ifdef DEBUG
179 #define DUMP_MAW(sc, name, reg) do { \
180 printf("%s: %s =\t0x%08x\n", device_xname((sc)->sc_dev), \
181 (name), (reg)); \
182 printf("%s:\tIBA/MASK =\t0x%08x/0x%08x (0x%08x - 0x%08x)\n", \
183 device_xname((sc)->sc_dev), \
184 reg & VRPCIU_MAW_IBAMASK, VRPCIU_MAW_ADDRMASK(reg), \
185 VRPCIU_MAW_ADDR(reg), \
186 VRPCIU_MAW_ADDR(reg) + VRPCIU_MAW_SIZE(reg)); \
187 printf("%s:\tWINEN =\t0x%08x\n", device_xname((sc)->sc_dev), \
188 reg & VRPCIU_MAW_WINEN); \
189 printf("%s:\tPCIADR =\t0x%08x\n", device_xname((sc)->sc_dev), \
190 VRPCIU_MAW_PCIADDR(reg)); \
191 } while (0)
192 #define DUMP_TAW(sc, name, reg) do { \
193 printf("%s: %s =\t\t0x%08x\n", device_xname((sc)->sc_dev), \
194 (name), (reg)); \
195 printf("%s:\tMASK =\t0x%08x\n", device_xname((sc)->sc_dev), \
196 VRPCIU_TAW_ADDRMASK(reg)); \
197 printf("%s:\tWINEN =\t0x%08x\n", device_xname((sc)->sc_dev), \
198 reg & VRPCIU_TAW_WINEN); \
199 printf("%s:\tIBA =\t0x%08x\n", device_xname((sc)->sc_dev), \
200 VRPCIU_TAW_IBA(reg)); \
201 } while (0)
202 reg = vrpciu_read(sc, VRPCIU_MMAW1REG);
203 DUMP_MAW(sc, "MMAW1", reg);
204 reg = vrpciu_read(sc, VRPCIU_MMAW2REG);
205 DUMP_MAW(sc, "MMAW2", reg);
206 reg = vrpciu_read(sc, VRPCIU_TAW1REG);
207 DUMP_TAW(sc, "TAW1", reg);
208 reg = vrpciu_read(sc, VRPCIU_TAW2REG);
209 DUMP_TAW(sc, "TAW2", reg);
210 reg = vrpciu_read(sc, VRPCIU_MIOAWREG);
211 DUMP_MAW(sc, "MIOAW", reg);
212 printf("%s: BUSERRAD =\t0x%08x\n", device_xname(sc->sc_dev),
213 vrpciu_read(sc, VRPCIU_BUSERRADREG));
214 printf("%s: INTCNTSTA =\t0x%08x\n", device_xname(sc->sc_dev),
215 vrpciu_read(sc, VRPCIU_INTCNTSTAREG));
216 printf("%s: EXACC =\t0x%08x\n", device_xname(sc->sc_dev),
217 vrpciu_read(sc, VRPCIU_EXACCREG));
218 printf("%s: RECONT =\t0x%08x\n", device_xname(sc->sc_dev),
219 vrpciu_read(sc, VRPCIU_RECONTREG));
220 printf("%s: PCIEN =\t0x%08x\n", device_xname(sc->sc_dev),
221 vrpciu_read(sc, VRPCIU_ENREG));
222 printf("%s: CLOCKSEL =\t0x%08x\n", device_xname(sc->sc_dev),
223 vrpciu_read(sc, VRPCIU_CLKSELREG));
224 printf("%s: TRDYV =\t0x%08x\n", device_xname(sc->sc_dev),
225 vrpciu_read(sc, VRPCIU_TRDYVREG));
226 printf("%s: CLKRUN =\t0x%08x\n", device_xname(sc->sc_dev),
227 vrpciu_read_2(sc, VRPCIU_CLKRUNREG));
228 printf("%s: IDREG =\t0x%08x\n", device_xname(sc->sc_dev),
229 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_ID_REG));
230 reg = vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG);
231 printf("%s: CSR =\t\t0x%08x\n", device_xname(sc->sc_dev), reg);
232 vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG, reg);
233 printf("%s: CSR =\t\t0x%08x\n", device_xname(sc->sc_dev),
234 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_COMMAND_STATUS_REG));
235 printf("%s: CLASS =\t0x%08x\n", device_xname(sc->sc_dev),
236 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_CLASS_REG));
237 printf("%s: BHLC =\t\t0x%08x\n", device_xname(sc->sc_dev),
238 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_BHLC_REG));
239 printf("%s: MAIL =\t\t0x%08x\n", device_xname(sc->sc_dev),
240 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MAILREG));
241 printf("%s: MBA1 =\t\t0x%08x\n", device_xname(sc->sc_dev),
242 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA1REG));
243 printf("%s: MBA2 =\t\t0x%08x\n", device_xname(sc->sc_dev),
244 vrpciu_read(sc, VRPCIU_CONF_BASE + VRPCIU_CONF_MBA2REG));
245 printf("%s: INTR =\t\t0x%08x\n", device_xname(sc->sc_dev),
246 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));
247 #if 0
248 vrpciu_write(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG,
249 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG) | 0x01);
250 printf("%s: INTR =\t\t0x%08x\n", device_xname(sc->sc_dev),
251 vrpciu_read(sc, VRPCIU_CONF_BASE + PCI_INTERRUPT_REG));
252 #endif
253 #endif
254
255 pc->pc_dev = sc->sc_dev;
256 pc->pc_attach_hook = vrpciu_attach_hook;
257 pc->pc_bus_maxdevs = vrpciu_bus_maxdevs;
258 pc->pc_bus_devorder = vrpciu_bus_devorder;
259 pc->pc_make_tag = vrpciu_make_tag;
260 pc->pc_decompose_tag = vrpciu_decompose_tag;
261 pc->pc_conf_read = vrpciu_conf_read;
262 pc->pc_conf_write = vrpciu_conf_write;
263 pc->pc_intr_map = vrpciu_intr_map;
264 pc->pc_intr_string = vrpciu_intr_string;
265 pc->pc_intr_evcnt = vrpciu_intr_evcnt;
266 pc->pc_intr_establish = vrpciu_intr_establish;
267 pc->pc_intr_disestablish = vrpciu_intr_disestablish;
268
269 #if 0
270 {
271 int i;
272
273 for (i = 0; i < 8; i++)
274 printf("%s: ID_REG(0, 0, %d) = 0x%08x\n",
275 device_xname(sc->sc_dev), i,
276 pci_conf_read(pc, pci_make_tag(pc, 0, 0, i),
277 PCI_ID_REG));
278 }
279 #endif
280
281 #if NPCI > 0
282 memset(&pba, 0, sizeof(pba));
283
284 /* For now, just inherit window mappings set by WinCE. XXX. */
285
286 iot = hpcmips_alloc_bus_space_tag();
287 reg = vrpciu_read(sc, VRPCIU_MIOAWREG);
288 snprintf(tmpbuf, sizeof(tmpbuf), "%s/iot",
289 device_xname(sc->sc_dev));
290 hpcmips_init_bus_space(iot, (struct bus_space_tag_hpcmips *)sc->sc_iot,
291 tmpbuf, VRPCIU_MAW_ADDR(reg), VRPCIU_MAW_SIZE(reg));
292 pba.pba_iot = &iot->bst;
293
294 /*
295 * Just use system bus space tag. It works since WinCE maps
296 * PCI bus space at same offset. But this isn't right thing
297 * of course. XXX.
298 */
299 pba.pba_memt = sc->sc_iot;
300 pba.pba_dmat = &hpcmips_default_bus_dma_tag.bdt;
301 pba.pba_dmat64 = NULL;
302 pba.pba_bus = 0;
303 pba.pba_bridgetag = NULL;
304
305 if (platid_match(&platid, &platid_mask_MACH_LASER5_L_BOARD)) {
306 /*
307 * fix PCI device configuration for L-Router.
308 */
309 /* change IDE controller to native mode */
310 reg = pci_conf_read(pc, pci_make_tag(pc, 0, 16, 0),
311 PCI_CLASS_REG);
312 reg |= PCIIDE_INTERFACE_PCI(0) << PCI_INTERFACE_SHIFT;
313 reg |= PCIIDE_INTERFACE_PCI(1) << PCI_INTERFACE_SHIFT;
314 pci_conf_write(pc, pci_make_tag(pc, 0, 16, 0), PCI_CLASS_REG,
315 reg);
316 /* fix broken BAR setting of fxp0, fxp1 */
317 pci_conf_write(pc, pci_make_tag(pc, 0, 0, 0), PCI_MAPREG_START,
318 0x11100000);
319 pci_conf_write(pc, pci_make_tag(pc, 0, 1, 0), PCI_MAPREG_START,
320 0x11200000);
321 }
322
323 pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
324 PCI_FLAGS_MRL_OKAY;
325 pba.pba_pc = pc;
326
327 config_found(self, &pba, pcibusprint, CFARGS_NONE);
328 #endif
329 }
330
331 /*
332 * Handle PCI error interrupts.
333 */
334 int
vrpciu_intr(void * arg)335 vrpciu_intr(void *arg)
336 {
337 struct vrpciu_softc *sc = (struct vrpciu_softc *)arg;
338 u_int32_t isr, baddr;
339
340 isr = vrpciu_read(sc, VRPCIU_INTCNTSTAREG);
341 baddr = vrpciu_read(sc, VRPCIU_BUSERRADREG);
342 printf("%s: status=0x%08x bad addr=0x%08x\n",
343 device_xname(sc->sc_dev), isr, baddr);
344 return ((isr & 0x0f) ? 1 : 0);
345 }
346
347 void
vrpciu_attach_hook(device_t parent,device_t self,struct pcibus_attach_args * pba)348 vrpciu_attach_hook(device_t parent, device_t self,
349 struct pcibus_attach_args *pba)
350 {
351
352 return;
353 }
354
355 int
vrpciu_bus_maxdevs(pci_chipset_tag_t pc,int busno)356 vrpciu_bus_maxdevs(pci_chipset_tag_t pc, int busno)
357 {
358
359 return (32);
360 }
361
362 int
vrpciu_bus_devorder(pci_chipset_tag_t pc,int busno,uint8_t * devs,int maxdevs)363 vrpciu_bus_devorder(pci_chipset_tag_t pc, int busno, uint8_t *devs, int maxdevs)
364 {
365 int dev, i, n;
366 uint8_t *devn;
367 char priorities[32];
368 static pcireg_t ids[] = {
369 /* these devices should be attached first */
370 PCI_ID_CODE(PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VRC4173_BCU),
371 };
372
373 n = MIN(32, maxdevs);
374 if (n <= 0)
375 return 0;
376
377 devn = devs + n;
378
379 /* scan PCI devices and check the id table */
380 memset(priorities, 0, sizeof(priorities));
381 for (dev = 0; dev < 32; dev++) {
382 pcireg_t id;
383 id = pci_conf_read(pc, pci_make_tag(pc, 0, dev, 0), PCI_ID_REG);
384 for (i = 0; i < __arraycount(ids); i++)
385 if (id == ids[i])
386 priorities[dev] = 1;
387 }
388
389 /* fill order array */
390 for (i = 1; 0 <= i; i--) {
391 for (dev = 0; dev < 32; dev++) {
392 if (priorities[dev] == i && devs != devn)
393 *devs++ = dev;
394 }
395 }
396
397 return n;
398 }
399
400 pcitag_t
vrpciu_make_tag(pci_chipset_tag_t pc,int bus,int device,int function)401 vrpciu_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
402 {
403
404 return ((bus << 16) | (device << 11) | (function << 8));
405 }
406
407 void
vrpciu_decompose_tag(pci_chipset_tag_t pc,pcitag_t tag,int * bp,int * dp,int * fp)408 vrpciu_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
409 int *fp)
410 {
411
412 if (bp != NULL)
413 *bp = (tag >> 16) & 0xff;
414 if (dp != NULL)
415 *dp = (tag >> 11) & 0x1f;
416 if (fp != NULL)
417 *fp = (tag >> 8) & 0x07;
418 }
419
420 pcireg_t
vrpciu_conf_read(pci_chipset_tag_t pc,pcitag_t tag,int reg)421 vrpciu_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
422 {
423 struct vrpciu_softc *sc = device_private(pc->pc_dev);
424 u_int32_t val;
425 int bus, device, function;
426
427 if ((unsigned int)reg >= PCI_CONF_SIZE)
428 return ((pcireg_t) -1);
429
430 pci_decompose_tag(pc, tag, &bus, &device, &function);
431 if (bus == 0) {
432 if (device > 21)
433 return ((pcitag_t)-1);
434 tag = (1 << (device + 11)) | (function << 8); /* Type 0 */
435 } else
436 tag |= VRPCIU_CONF_TYPE1;
437
438 vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg);
439 val = vrpciu_read(sc, VRPCIU_CONFDREG);
440 #if 0
441 printf("%s: conf_read: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
442 device_xname(sc->sc_dev), (u_int32_t)tag, reg, val);
443 #endif
444 return (val);
445 }
446
447 void
vrpciu_conf_write(pci_chipset_tag_t pc,pcitag_t tag,int reg,pcireg_t data)448 vrpciu_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg,
449 pcireg_t data)
450 {
451 struct vrpciu_softc *sc = device_private(pc->pc_dev);
452 int bus, device, function;
453
454 #if 0
455 printf("%s: conf_write: tag = 0x%08x, reg = 0x%x, val = 0x%08x\n",
456 device_xname(sc->sc_dev), (u_int32_t)tag, reg, (u_int32_t)data);
457 #endif
458
459 if ((unsigned int)reg >= PCI_CONF_SIZE)
460 return;
461
462 vrpciu_decompose_tag(pc, tag, &bus, &device, &function);
463 if (bus == 0) {
464 if (device > 21)
465 return;
466 tag = (1 << (device + 11)) | (function << 8); /* Type 0 */
467 } else
468 tag |= VRPCIU_CONF_TYPE1;
469
470 vrpciu_write(sc, VRPCIU_CONFAREG, tag | reg);
471 vrpciu_write(sc, VRPCIU_CONFDREG, data);
472 }
473
474 int
vrpciu_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)475 vrpciu_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
476 {
477 pci_chipset_tag_t pc = pa->pa_pc;
478 pcitag_t intrtag = pa->pa_intrtag;
479 int bus, dev, func;
480 #ifdef DEBUG
481 int line = pa->pa_intrline;
482 int pin = pa->pa_intrpin;
483 #endif
484
485 pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
486 DPRINTF(("%s(%d, %d, %d): line = %d, pin = %d\n", device_xname(pc->pc_dev),
487 bus, dev, func, line, pin));
488
489 *ihp = CONFIG_HOOK_PCIINTR_ID(bus, dev, func);
490
491 return (0);
492 }
493
494 const char *
vrpciu_intr_string(pci_chipset_tag_t pc,pci_intr_handle_t ih,char * buf,size_t len)495 vrpciu_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih, char *buf,
496 size_t len)
497 {
498 snprintf(buf, len, "pciintr %d:%d:%d",
499 CONFIG_HOOK_PCIINTR_BUS((int)ih),
500 CONFIG_HOOK_PCIINTR_DEVICE((int)ih),
501 CONFIG_HOOK_PCIINTR_FUNCTION((int)ih));
502
503 return buf;
504 }
505
506 const struct evcnt *
vrpciu_intr_evcnt(pci_chipset_tag_t pc,pci_intr_handle_t ih)507 vrpciu_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
508 {
509
510 /* XXX for now, no evcnt parent reported */
511
512 return (NULL);
513 }
514
515 void *
vrpciu_intr_establish(pci_chipset_tag_t pc,pci_intr_handle_t ih,int level,int (* func)(void *),void * arg)516 vrpciu_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
517 int (*func)(void *), void *arg)
518 {
519
520 if (ih == -1)
521 return (NULL);
522 DPRINTF(("vrpciu_intr_establish: %lx\n", ih));
523
524 return (config_hook(CONFIG_HOOK_PCIINTR, ih, CONFIG_HOOK_EXCLUSIVE,
525 (int (*)(void *, int, long, void *))func, arg));
526 }
527
528 void
vrpciu_intr_disestablish(pci_chipset_tag_t pc,void * cookie)529 vrpciu_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
530 {
531
532 DPRINTF(("vrpciu_intr_disestablish: %p\n", cookie));
533 config_unhook(cookie);
534 }
535