xref: /netbsd-src/sys/arch/hpcmips/isa/isa_machdep.c (revision 9cc225e6d6f30ad62002612ed4fb940d43bd8e77)
1 /*	$NetBSD: isa_machdep.c,v 1.42 2022/09/25 12:41:46 andvar Exp $	*/
2 
3 /*-
4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.42 2022/09/25 12:41:46 andvar Exp $");
34 
35 #include "opt_vr41xx.h"
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/reboot.h>
40 #include <sys/device.h>
41 
42 #include <dev/isa/isavar.h>
43 #include <dev/isa/isareg.h>
44 
45 #include <machine/platid.h>
46 #include <machine/platid_mask.h>
47 #include <machine/bus.h>
48 #include <machine/bus_space_hpcmips.h>
49 #include <machine/debug.h>
50 
51 #include <dev/hpc/hpciovar.h>
52 
53 #include <hpcmips/vr/vripif.h>
54 
55 #include "locators.h"
56 
57 #define VRISADEBUG
58 
59 #ifdef VRISADEBUG
60 #ifndef VRISADEBUG_CONF
61 #define VRISADEBUG_CONF 0
62 #endif /* VRISADEBUG_CONF */
63 int vrisa_debug = VRISADEBUG_CONF;
64 #define DPRINTF(arg) if (vrisa_debug) printf arg;
65 #define DBITDISP(mask) if (vrisa_debug) dbg_bit_print(mask);
66 #define VPRINTF(arg) if (bootverbose || vrisa_debug) printf arg;
67 #else /* VRISADEBUG */
68 #define DPRINTF(arg)
69 #define DBITDISP(mask)
70 #define VPRINTF(arg) if (bootverbose) printf arg;
71 #endif /* VRISADEBUG */
72 
73 /*
74  * interrupt no. encoding:
75  *
76  * 0x0000000f ISA IRQ#
77  * 0x00ff0000 GPIO port#
78  * 0x01000000 interrupt signal hold/through	(1:hold/0:though)
79  * 0x02000000 interrupt detection level		(1:low /0:high	)
80  * 0x04000000 interrupt detection trigger	(1:edge/0:level	)
81  */
82 #define INTR_IRQ(i)	(((i)>> 0) & 0x0f)
83 #define INTR_PORT(i)	(((i)>>16) & 0xff)
84 #define INTR_MODE(i)	(((i)>>24) & 0x07)
85 #define INTR_NIRQS	16
86 
87 int	vrisabprint(void *, const char *);
88 int	vrisabmatch(device_t, cfdata_t, void *);
89 void	vrisabattach(device_t, device_t, void *);
90 
91 struct vrisab_softc {
92 	hpcio_chip_t sc_hc;
93 	int sc_intr_map[INTR_NIRQS]; /* ISA <-> GIU interrupt line mapping */
94 	struct hpcmips_isa_chipset sc_isa_ic;
95 };
96 
97 CFATTACH_DECL_NEW(vrisab, sizeof(struct vrisab_softc),
98     vrisabmatch, vrisabattach, NULL, NULL);
99 
100 #ifdef DEBUG_FIND_PCIC
101 #include <mips/cpuregs.h>
102 #warning DEBUG_FIND_PCIC
103 static void __find_pcic(void);
104 #endif
105 
106 #ifdef DEBUG_FIND_COMPORT
107 #include <mips/cpuregs.h>
108 #include <dev/ic/ns16550reg.h>
109 #include <dev/ic/comreg.h>
110 #warning DEBUG_FIND_COMPORT
111 static void __find_comport(void);
112 #endif
113 
114 int
vrisabmatch(device_t parent,cfdata_t match,void * aux)115 vrisabmatch(device_t parent, cfdata_t match, void *aux)
116 {
117 	struct hpcio_attach_args *haa = aux;
118 	platid_mask_t mask;
119 	int n;
120 
121 	if (strcmp(haa->haa_busname, match->cf_name))
122 		return (0);
123 
124 	if (match->cf_loc[HPCIOIFCF_PLATFORM] == HPCIOIFCF_PLATFORM_DEFAULT)
125 		return (1);
126 
127 	mask = PLATID_DEREF(match->cf_loc[HPCIOIFCF_PLATFORM]);
128 	if ((n = platid_match(&platid, &mask)) != 0)
129 		return (n + 2);
130 
131 	return (0);
132 }
133 
134 void
vrisabattach(device_t parent,device_t self,void * aux)135 vrisabattach(device_t parent, device_t self, void *aux)
136 {
137 	struct hpcio_attach_args *haa = aux;
138 	struct vrisab_softc *sc = device_private(self);
139 	struct isabus_attach_args iba;
140 	struct bus_space_tag_hpcmips *iot, *memt;
141 	bus_addr_t offset;
142 	int i;
143 
144 	sc->sc_hc = (*haa->haa_getchip)(haa->haa_sc, VRIP_IOCHIP_VRGIU);
145 	sc->sc_isa_ic.ic_sc = sc;
146 
147 	iba.iba_ic	= &sc->sc_isa_ic;
148 	iba.iba_dmat    = 0; /* XXX not yet */
149 
150 	/* Allocate ISA memory space */
151 	memt = hpcmips_alloc_bus_space_tag();
152 	offset = device_cfdata(self)->cf_loc[VRISABIFCF_ISAMEMOFFSET];
153 	hpcmips_init_bus_space(memt,
154 	    (struct bus_space_tag_hpcmips *)haa->haa_iot, "ISA mem",
155 	    VR_ISA_MEM_BASE + offset, VR_ISA_MEM_SIZE - offset);
156 	iba.iba_memt = &memt->bst;
157 
158 	/* Allocate ISA port space */
159 	iot = hpcmips_alloc_bus_space_tag();
160 	offset = device_cfdata(self)->cf_loc[VRISABIFCF_ISAPORTOFFSET];
161 	hpcmips_init_bus_space(iot,
162 	    (struct bus_space_tag_hpcmips *)haa->haa_iot, "ISA port",
163 	    VR_ISA_PORT_BASE + offset, VR_ISA_PORT_SIZE - offset);
164 	iba.iba_iot = &iot->bst;
165 
166 #ifdef DEBUG_FIND_PCIC
167 #warning DEBUG_FIND_PCIC
168 	__find_pcic();
169 #else
170 	/* Initialize ISA IRQ <-> GPIO mapping */
171 	for (i = 0; i < INTR_NIRQS; i++)
172 		sc->sc_intr_map[i] = -1;
173 	printf(": ISA port %#x-%#x mem %#x-%#x\n",
174 	    iot->base, iot->base + iot->size,
175 	    memt->base, memt->base + memt->size);
176 	config_found(self, &iba, vrisabprint, CFARGS_NONE);
177 #endif
178 
179 #ifdef DEBUG_FIND_COMPORT
180 #warning DEBUG_FIND_COMPORT
181 	__find_comport();
182 #endif
183 }
184 
185 int
vrisabprint(void * aux,const char * pnp)186 vrisabprint(void *aux, const char *pnp)
187 {
188 	if (pnp)
189 		return (QUIET);
190 
191 	return (UNCONF);
192 }
193 
194 void
isa_attach_hook(device_t parent,device_t self,struct isabus_attach_args * iba)195 isa_attach_hook(device_t parent, device_t self,
196     struct isabus_attach_args *iba)
197 {
198 
199 }
200 
201 void
isa_detach_hook(isa_chipset_tag_t ic,device_t self)202 isa_detach_hook(isa_chipset_tag_t ic, device_t self)
203 {
204 }
205 
206 const struct evcnt *
isa_intr_evcnt(isa_chipset_tag_t ic,int irq)207 isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
208 {
209 
210 	/* XXX for now, no evcnt parent reported */
211 	return (NULL);
212 }
213 
214 void *
isa_intr_establish(isa_chipset_tag_t ic,int intr,int type,int level,int (* ih_fun)(void *),void * ih_arg)215 isa_intr_establish(isa_chipset_tag_t ic, int intr, int type, int level,
216     int (*ih_fun)(void*), void *ih_arg)
217 {
218 	struct vrisab_softc *sc = ic->ic_sc;
219 	int port, irq, mode;
220 
221 	static int intr_modes[8] = {
222 		HPCIO_INTR_LEVEL_HIGH_THROUGH,
223 		HPCIO_INTR_LEVEL_HIGH_HOLD,
224 		HPCIO_INTR_LEVEL_LOW_THROUGH,
225 		HPCIO_INTR_LEVEL_LOW_HOLD,
226 		HPCIO_INTR_EDGE_THROUGH,
227 		HPCIO_INTR_EDGE_HOLD,
228 		HPCIO_INTR_EDGE_THROUGH,
229 		HPCIO_INTR_EDGE_HOLD,
230 	};
231 #ifdef VRISADEBUG
232 	static const char* intr_mode_names[8] = {
233 		"level high through",
234 		"level high hold",
235 		"level low through",
236 		"level low hold",
237 		"edge through",
238 		"edge hold",
239 		"edge through",
240 		"edge hold",
241 	};
242 #endif /* VRISADEBUG */
243 	/*
244 	 * ISA IRQ <-> GPIO port mapping
245 	 */
246 	irq = INTR_IRQ(intr);
247 	if (sc->sc_intr_map[irq] != -1) {
248 		/* already mapped */
249 		intr = sc->sc_intr_map[irq];
250 	} else {
251 		/* not mapped yet */
252 		sc->sc_intr_map[irq] = intr; /* Register it */
253 	}
254 	mode = INTR_MODE(intr);
255 	port = INTR_PORT(intr);
256 
257 	VPRINTF(("ISA IRQ %d -> %s port %d, %s\n",
258 	    irq, sc->sc_hc->hc_name, port, intr_mode_names[mode]));
259 
260 	/* Call Vr routine */
261 	return (hpcio_intr_establish(sc->sc_hc, port, intr_modes[mode],
262 	    ih_fun, ih_arg));
263 }
264 
265 void
isa_intr_disestablish(isa_chipset_tag_t ic,void * arg)266 isa_intr_disestablish(isa_chipset_tag_t ic, void *arg)
267 {
268 	struct vrisab_softc *sc = ic->ic_sc;
269 	/* Call Vr routine */
270 	hpcio_intr_disestablish(sc->sc_hc, arg);
271 }
272 
273 int
isa_intr_alloc(isa_chipset_tag_t ic,int mask,int type,int * irq)274 isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
275 {
276 	/* XXX not coded yet. this is temporary XXX */
277 	DPRINTF(("isa_intr_alloc:"));
278 	DBITDISP(mask);
279 	*irq = (ffs(mask) -1); /* XXX */
280 
281 	return (0);
282 }
283 
284 #ifdef DEBUG_FIND_PCIC
285 #warning DEBUG_FIND_PCIC
286 static void
__find_pcic(void)287 __find_pcic(void)
288 {
289 	int i, j, step, found;
290 	u_int32_t addr;
291 	u_int8_t reg;
292 	int __read_revid (u_int32_t port)
293 	    {
294 		    addr = MIPS_PHYS_TO_KSEG1(i + port);
295 		    printf("%#x\r", i);
296 		    for (found = 0, j = 0; j < 0x100; j += 0x40) {
297 			    *((volatile u_int8_t *)addr) = j;
298 			    reg = *((volatile u_int8_t *)(addr + 1));
299 #ifdef DEBUG_FIND_PCIC_I82365SL_ONLY
300 			    if (reg == 0x82 || reg == 0x83) {
301 #else
302 			    if ((reg & 0xc0) == 0x80) {
303 #endif
304 					    found++;
305 			    }
306 			    if (found)
307 				    printf("\nfound %d socket at %#x"
308 					"(base from %#x)\n", found, addr,
309 					i + port - VR_ISA_PORT_BASE);
310 		    }
311 	    }
312 	step = 0x1000000;
313 	printf("\nFinding PCIC. Trying ISA port %#x-%#x step %#x\n",
314 	    VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE, step);
315 	for (i = VR_ISA_PORT_BASE; i < VR_ISA_PORT_BASE+VR_ISA_PORT_SIZE;
316 	    i+= step) {
317 		__read_revid (0x3e0);
318 		__read_revid (0x3e2);
319 	}
320 }
321 #endif /* DEBUG_FIND_PCIC */
322 
323 
324 #ifdef DEBUG_FIND_COMPORT
325 #warning DEBUG_FIND_COMPORT
326 
327 static int probe_com(u_int32_t);
328 
329 static int
330 probe_com(u_int32_t port_addr)
331 {
332 	u_int32_t addr;
333 	u_int8_t ubtmp1, ubtmp2;
334 
335 	addr = MIPS_PHYS_TO_KSEG1(port_addr);
336 
337 	*((volatile u_int8_t *)(addr + com_cfcr)) = LCR_8BITS;
338 	*((volatile u_int8_t *)(addr + com_iir)) = 0;
339 
340 	ubtmp1 = *((volatile u_int8_t *)(addr + com_cfcr));
341 	ubtmp2 = *((volatile u_int8_t *)(addr + com_iir));
342 
343 	if ((ubtmp1 != LCR_8BITS) || ((ubtmp2 & 0x38) != 0)) {
344 		return (0);
345 	}
346 
347 	return (1);
348 }
349 
350 static void
351 __find_comport(void)
352 {
353 	int found;
354 	u_int32_t port, step;
355 
356 	found = 0;
357 	step = 0x08;
358 
359 	printf("Searching COM port. Trying ISA port %#x-%#x step %#x\n",
360 	    VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE - 1, step );
361 
362 	for (port = VR_ISA_PORT_BASE;
363 	    port < (VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE); port += step){
364 		if (probe_com(port)) {
365 			found++;
366 			printf("found %d at %#x\n", found, port);
367 		}
368 	}
369 }
370 #endif /* DEBUG_FIND_COMPORT */
371