1 /* $NetBSD: grf_rbreg.h,v 1.2 2011/02/08 20:20:14 rmind Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: Utah $Hdr: grf_rbreg.h 1.9 92/01/21$ 37 * 38 * @(#)grf_rbreg.h 8.1 (Berkeley) 6/10/93 39 */ 40 41 /* 42 * Map of the Renaissance frame buffer controller chip in memory ... 43 */ 44 45 #include <hp300/dev/iotypes.h> /* XXX */ 46 47 #define rb_waitbusy(regaddr) \ 48 while (((struct rboxfb *)(regaddr))->wbusy & 0x01) DELAY(100) 49 50 #define CM1RED ((struct rencm *)((char *)ip->regbase + 0x6400)) 51 #define CM1GRN ((struct rencm *)((char *)ip->regbase + 0x6800)) 52 #define CM1BLU ((struct rencm *)((char *)ip->regbase + 0x6C00)) 53 #define CM2RED ((struct rencm *)((char *)ip->regbase + 0x7400)) 54 #define CM2GRN ((struct rencm *)((char *)ip->regbase + 0x7800)) 55 #define CM2BLU ((struct rencm *)((char *)ip->regbase + 0x7C00)) 56 57 struct rencm { 58 u_char :8, :8, :8; 59 vu_char value; 60 }; 61 62 struct rboxfb { 63 u_char filler1[1]; 64 vu_char reset; /* reset register 0x01 */ 65 vu_char fb_address; /* frame buffer address 0x02 */ 66 vu_char interrupt; /* interrupt register 0x03 */ 67 u_char filler1a; 68 vu_char fbwmsb; /* frame buffer width MSB 0x05 */ 69 u_char filler1b; 70 vu_char fbwlsb; /* frame buffer width MSB 0x07 */ 71 u_char filler1c; 72 vu_char fbhmsb; /* frame buffer height MSB 0x09 */ 73 u_char filler1d; 74 vu_char fbhlsb; /* frame buffer height MSB 0x0b */ 75 u_char filler1e; 76 vu_char dwmsb; /* display width MSB 0x0d */ 77 u_char filler1f; 78 vu_char dwlsb; /* display width MSB 0x0f */ 79 u_char filler1g; 80 vu_char dhmsb; /* display height MSB 0x11 */ 81 u_char filler1h; 82 vu_char dhlsb; /* display height MSB 0x13 */ 83 u_char filler1i; 84 vu_char fbid; /* frame buffer id 0x15 */ 85 u_char filler1j[0x47]; 86 vu_char fbomsb; /* frame buffer offset MSB 0x5d */ 87 u_char filler1k; 88 vu_char fbolsb; /* frame buffer offset LSB 0x5f */ 89 u_char filler2[16359]; 90 vu_char wbusy; /* window mover is active 0x4047 */ 91 u_char filler3[0x405b - 0x4048]; 92 vu_char scanbusy; /* scan converteris active 0x405B */ 93 u_char filler3b[0x4083 - 0x405c]; 94 vu_char video_enable; /* drive vid. refresh bus 0x4083 */ 95 u_char filler4[3]; 96 vu_char display_enable; /* enable the display 0x4087 */ 97 u_char filler5[8]; 98 vu_int write_enable; /* write enable register 0x4090 */ 99 u_char filler6[11]; 100 vu_char wmove; /* start window mover 0x409f */ 101 u_char filler7[3]; 102 vu_char blink; /* blink register 0x40a3 */ 103 u_char filler8[15]; 104 vu_char fold; /* fold register 0x40b3 */ 105 vu_int opwen; /* overlay plane write enable 0x40b4 */ 106 u_char filler9[3]; 107 vu_char tmode; /* Tile mode size 0x40bb */ 108 u_char filler9a[3]; 109 vu_char drive; /* drive register 0x40bf */ 110 u_char filler10[3]; 111 vu_char vdrive; /* vdrive register 0x40c3 */ 112 u_char filler10a[0x40cb-0x40c4]; 113 vu_char zconfig; /* Z-buffer mode 0x40cb */ 114 u_char filler11a[2]; 115 vu_short tpatt; /* Transparency pattern 0x40ce */ 116 u_char filler11b[3]; 117 vu_char dmode; /* dither mode 0x40d3 */ 118 u_char filler11c[3]; 119 vu_char en_scan; /* enable scan board to DTACK 0x40d7 */ 120 u_char filler11d[0x40ef-0x40d8]; 121 vu_char rep_rule; /* replacement rule 0x40ef */ 122 u_char filler12[2]; 123 vu_short source_x; /* source x 0x40f2 */ 124 u_char filler13[2]; 125 vu_short source_y; /* source y 0x40f6 */ 126 u_char filler14[2]; 127 vu_short dest_x; /* dest x 0x40fa */ 128 u_char filler15[2]; 129 vu_short dest_y; /* dest y 0x40fe */ 130 u_char filler16[2]; 131 vu_short wwidth; /* window width 0x4102 */ 132 u_char filler17[2]; 133 vu_short wheight; /* window height 0x4106 */ 134 u_char filler18[18]; 135 vu_short patt_x; /* pattern x 0x411a */ 136 u_char filler19[2]; 137 vu_short patt_y; /* pattern y 0x411e */ 138 u_char filler20[0x8012 - 0x4120]; 139 vu_short te_status; /* transform engine status 0x8012 */ 140 u_char filler21[0x1ffff-0x8014]; 141 }; 142