1/* $NetBSD: locore.S,v 1.3 2022/05/07 04:12:54 rin Exp $ */ 2 3/* 4 * Taken from src/sys/arch/powerpc/ibm4xx/openbios/locore.s: 5 * NetBSD: locore.S,v 1.17 2021/03/30 01:57:20 rin Exp 6 */ 7 8/* 9 * Copyright 2001 Wasabi Systems, Inc. 10 * All rights reserved. 11 * 12 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. All advertising materials mentioning features or use of this software 23 * must display the following acknowledgement: 24 * This product includes software developed for the NetBSD Project by 25 * Wasabi Systems, Inc. 26 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 27 * or promote products derived from this software without specific prior 28 * written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 * POSSIBILITY OF SUCH DAMAGE. 41 */ 42 43/* 44 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 45 * Copyright (C) 1995, 1996 TooLs GmbH. 46 * All rights reserved. 47 * 48 * Redistribution and use in source and binary forms, with or without 49 * modification, are permitted provided that the following conditions 50 * are met: 51 * 1. Redistributions of source code must retain the above copyright 52 * notice, this list of conditions and the following disclaimer. 53 * 2. Redistributions in binary form must reproduce the above copyright 54 * notice, this list of conditions and the following disclaimer in the 55 * documentation and/or other materials provided with the distribution. 56 * 3. All advertising materials mentioning features or use of this software 57 * must display the following acknowledgement: 58 * This product includes software developed by TooLs GmbH. 59 * 4. The name of TooLs GmbH may not be used to endorse or promote products 60 * derived from this software without specific prior written permission. 61 * 62 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 63 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 64 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 65 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 66 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 67 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 68 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 69 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 70 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 71 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 72 */ 73 74#ifdef PPC_4XX_NOCACHE 75#error Not tested. 76#endif 77 78#include "assym.h" 79#include "ksyms.h" 80 81#ifdef _KERNEL_OPT 82#include "opt_ddb.h" 83#include "opt_modular.h" 84#include "opt_ppcparam.h" 85#endif 86 87#include <machine/param.h> 88#include <machine/asm.h> 89#include <machine/psl.h> 90#include <machine/trap.h> 91 92#include <powerpc/spr.h> 93#include <powerpc/ibm4xx/spr.h> 94 95#include <powerpc/ibm4xx/dcr4xx.h> 96 97/* 98 * This symbol is here for the benefit of kvm_mkdb, and is supposed to 99 * mark the start of kernel text. 100 */ 101 .text 102 .globl _C_LABEL(kernel_text) 103_C_LABEL(kernel_text): 104 105/* 106 * Startup entry. Note, this must be the first thing in the text 107 * segment! 108 */ 109 .text 110 .globl __start 111__start: 112 li %r0,0 113 mtmsr %r0 /* Disable FPU/MMU/exceptions */ 114 isync 115 116 /* 117 * Errata 213: Incorrect data may be flushed from the data cache. 118 * Cores: PPC405D5X1, PPC405D5X2 119 * Workaround: #1, CCR0 modification sequence #2 120 * Note: Meaning of bits we need to set is undocumented. 121 */ 122 sync 123 mfspr %r0,SPR_CCR0 /* XXXclang: mfccr0 %r0 */ 124 oris %r0,%r0,0x50000000@h 125 mtspr SPR_CCR0,%r0 /* XXXclang: mtccr0 %r0 */ 126 isync 127 128 /* PPC405GP errata, item #58. 129 * Load string instructions may write incorrect data into the last GPR 130 * targeted in the operation. 131 * Workaround: set OCM0_DSCNTL[DSEN]=0 and OCM0_DSCNTL[DOF]=0 */ 132 li %r0,0 133 mtdcr DCR_OCM0_DSCNTL, %r0 /* Disable Data access to OCM */ 134 mtdcr DCR_OCM0_ISCNTL, %r0 /* Disable Instruction access to OCM. 135 Just in case */ 136#ifdef PPC_4XX_NOCACHE 137 /* Disable all caches for physical addresses */ 138 li %r0,0 139#else 140 /* Allow cacheing for only the first 2GB of RAM */ 141 lis %r0,0xffff 142#endif 143 mtdccr %r0 144 mticcr %r0 145 146 /* Invalidate all TLB entries */ 147 tlbia 148 sync 149 isync 150 151 /* Get start of BSS */ 152 lis %r3,_C_LABEL(_edata)-4@ha 153 addi %r3,%r3,_C_LABEL(_edata)-4@l 154 /* Get end of kernel memory */ 155 lis %r8,_C_LABEL(end)@ha 156 addi %r8,%r8,_C_LABEL(end)@l 157 /* Zero BSS */ 158 li %r4,0 1592: stwu %r4,4(%r3) 160 cmpw %r3,%r8 161 bne+ 2b 162 163#if NKSYMS > 0 || defined(DDB) || defined(MODULAR) 164 /* 165 * If we had symbol table location we'd store it here and would've 166 * adjusted r8 here. 167 */ 168 lis %r7,_C_LABEL(startsym)@ha 169 addi %r7,%r7,_C_LABEL(startsym)@l 170 stw %r8,0(%r7) 171 lis %r7,_C_LABEL(endsym)@ha 172 addi %r7,%r7,_C_LABEL(endsym)@l 173 stw %r8,0(%r7) 174#endif 175 176 /* Set kernel MMU context. */ 177 li %r0,KERNEL_PID 178 mtpid %r0 179 sync 180 181 INIT_CPUINFO(%r8,%r1,%r9,%r0) 182 mr %r4,%r8 183 184 lis %r3,__start@ha 185 addi %r3,%r3,__start@l 186 187 mr %r6,%r31 /* info_block address */ 188 bl _C_LABEL(initppc) 189 bl _C_LABEL(main) 190 191loop: b loop /* XXX not reached */ 192 193#include <powerpc/ibm4xx/4xx_locore.S> 194