1 /* $NetBSD: gdium_bus_mem.c,v 1.3 2023/12/20 14:12:25 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Platform-specific PCI bus memory support for the Gdium Liberty 1000. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: gdium_bus_mem.c,v 1.3 2023/12/20 14:12:25 thorpej Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/device.h> 41 #include <sys/syslog.h> 42 #include <sys/systm.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <mips/locore.h> 47 48 #include <mips/bonito/bonitoreg.h> 49 50 #include <evbmips/gdium/gdiumvar.h> 51 52 #define CHIP gdium 53 #define CHIP_MEM /* defined */ 54 55 #define CHIP_EX_MALLOC_SAFE(v) (((struct gdium_config *)(v))->gc_mallocsafe) 56 #define CHIP_MEM_EXTENT(v) (((struct gdium_config *)(v))->gc_mem_ex) 57 58 /* 59 * There are actually 3 PCILO memory windows, but PMON configures them 60 * so that they map PCI memory space contiguously. 61 */ 62 63 /* MEM region 1 */ 64 #define CHIP_W1_BUS_START(v) 0x00000000UL 65 #define CHIP_W1_BUS_END(v) 0x0bffffffUL 66 #define CHIP_W1_SYS_START(v) ((u_long)BONITO_PCILO_BASE) 67 #define CHIP_W1_SYS_END(v) ((u_long)BONITO_PCILO_BASE + 0x0bffffffUL) 68 69 #if 0 /* XXX Should implement access to this via TLB or 64-bit KSEG */ 70 /* MEM region 2 */ 71 #define CHIP_W2_BUS_START(v) 0x20000000UL 72 #define CHIP_W2_BUS_END(v) 0x3fffffffUL 73 #define CHIP_W2_SYS_START(v) ((u_long)BONITO_PCIHI_BASE) 74 #define CHIP_W2_SYS_END(v) ((u_long)BONITO_PCIHI_BASE + 0xe0000000UL) 75 #endif 76 77 #include <mips/mips/bus_space_alignstride_chipdep.c> 78