xref: /netbsd-src/sys/arch/evbmips/alchemy/dbau1550reg.h (revision 118d36b6e72ac750e18f61b91e5b424267502d71)
1 /* $NetBSD: dbau1550reg.h,v 1.5 2006/10/02 08:13:53 gdamore Exp $ */
2 
3 /*-
4  * Copyright (c) 2006 Itronix Inc.
5  * All rights reserved.
6  *
7  * Written by Garrett D'Amore for Itronix Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. The name of Itronix Inc. may not be used to endorse
18  *    or promote products derived from this software without specific
19  *    prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28  * ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Board-specific registers for DBAu1550.
36  */
37 
38 #define	DBAU1550_WHOAMI		0x0F000000
39 #define	DBAU1550_STATUS		0x0F000004
40 #define	DBAU1550_SWITCHES	0x0F000008
41 #define	DBAU1550_RESETS		0x0F00000C
42 #define	DBAU1550_PCMCIA		0x0F000010
43 #define	DBAU1550_BOARD_SPECIFIC	0x0F000014
44 #define	DBAU1550_DISC_LEDS	0x0F000018
45 #define	DBAU1550_SOFTWARE_RESET	0x0F00001C
46 #define	DBAU1550_HEX_LEDS	0x0F400000
47 #define	DBAU1550_HEX_BLANK	0x0F400008
48 
49 /*
50  * DBAU1550_WHOAMI
51  */
52 #define	DBAU1550_WHOAMI_BOARD_MASK	0x0f00
53 #define	DBAU1550_WHOAMI_PB1500_REV1	0x1
54 #define	DBAU1550_WHOAMI_PB1500_REV2	0x2
55 #define	DBAU1550_WHOAMI_PB1100		0x3
56 #define	DBAU1550_WHOAMI_DBAU1000	0x4
57 #define	DBAU1550_WHOAMI_DBAU1100	0x5
58 #define	DBAU1550_WHOAMI_DBAU1500	0x6
59 #define	DBAU1550_WHOAMI_DBAU1550_REV1	0x7
60 #define	DBAU1550_WHOAMI_PB1550_DDR	0x8
61 #define	DBAU1550_WHOAMI_PB1550_SDR	0x9
62 
63 #define	DBAU1550_WHOAMI_BOARD(x)	(((x) >> 8) & 0xf)
64 #define	DBAU1550_WHOAMI_CPLD(x)		(((x) >> 4) & 0xf)
65 #define	DBAU1550_WHOAMI_DAUGHTER(x)	((x) & 0xf)
66 
67 /*
68  * DBAU1550_BCSR
69  */
70 #define	DBAU1550_STATUS_SWAPBOOT		(1 << 13)
71 #define	DBAU1550_STATUS_PCMCIA1_INSERTED	(1 << 5)
72 #define	DBAU1550_STATUS_PCMCIA0_INSERTED	(1 << 4)
73 #define	DBAU1550_STATUS_PCMCIA_VS_MASK		0x0003
74 #define	DBAU1550_STATUS_PCMCIA1_VS_SHIFT	2
75 #define	DBAU1550_STATUS_PCMCIA0_VS_SHIFT	0
76 #define	DBAU1550_STATUS_PCMCIA_VS_3V_X		0
77 #define	DBAU1550_STATUS_PCMCIA_VS_3V		2
78 #define	DBAU1550_STATUS_PCMCIA_VS_GND		1
79 #define	DBAU1550_STATUS_PCMCIA_VS_5V		3
80 
81 /*
82  * DBAU1550_BOARD_SPECIFIC
83  */
84 #define	DBAU1550_SPI_DEV_SEL			(1 << 13)
85 #define	DBAU1550_PCI_CFG_HOST			(1 << 12)
86 #define	DBAU1550_PCI_EN_GPIO200_RST		(1 << 10)
87 #define	DBAU1550_PCI_M33			(1 << 8)
88 #define	DBAU1550_PCI_M66EN			(1 << 0)
89 
90 /*
91  * DBAU1550_SOFTWARE_RESET
92  */
93 #define	DBAU1550_SOFTWARE_RESET_RESET		(1 << 15)
94 #define	DBAU1550_SOFTWARE_RESET_PWROFF		(1 << 14)
95 
96 /*
97  * DBAU1550_PCMCIA - note that upper byte is PCMCIA1 and lower is PCMCIA0
98  */
99 #define	DBAU1550_PCMCIA_PC1_SHIFT		(8)
100 #define	DBAU1550_PCMCIA_PC0_SHIFT		(0)
101 #define	DBAU1550_PCMCIA_MASK			0xff
102 
103 #define	DBAU1550_PCMCIA_RST			(1 << 7)
104 #define	DBAU1550_PCMCIA_DRV_EN			(1 << 4)
105 /* vcc */
106 #define	DBAU1550_PCMCIA_VCC_GND			(0 << 2)
107 #define	DBAU1550_PCMCIA_VCC_3V			(1 << 2)
108 #define	DBAU1550_PCMCIA_VCC_5V			(2 << 2)
109 /* vpp */
110 #define	DBAU1550_PCMCIA_VPP_GND			(0 << 0)
111 #define	DBAU1550_PCMCIA_VPP_VCC			(1 << 0)
112 #define	DBAU1550_PCMCIA_VPP_12V			(2 << 0)
113 #define	DBAU1550_PCMCIA_VPP_HIZ			(3 << 0)
114 
115 /*
116  * Address offsets used to select a PCMCIA slot.
117  */
118 #define	DBAU1550_PC0_ADDR			(0)
119 #define	DBAU1550_PC1_ADDR			(1 << 26)
120