1 /* $NetBSD: npwr_fc_pci.c,v 1.5 2019/01/09 07:49:22 msaitoh Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * IQ80321 PCI interrupt support.
40 */
41
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: npwr_fc_pci.c,v 1.5 2019/01/09 07:49:22 msaitoh Exp $");
44
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/device.h>
48
49 #include <machine/autoconf.h>
50 #include <sys/bus.h>
51
52 #include <evbarm/iq80321/iq80321reg.h>
53 #include <evbarm/iq80321/iq80321var.h>
54
55 #include <arm/xscale/i80321reg.h>
56 #include <arm/xscale/i80321var.h>
57
58 #include <dev/pci/pcidevs.h>
59 #include <dev/pci/ppbreg.h>
60
61 int iq80321_pci_intr_map(const struct pci_attach_args *,
62 pci_intr_handle_t *);
63 const char *iq80321_pci_intr_string(void *, pci_intr_handle_t, char *, size_t);
64 const struct evcnt *iq80321_pci_intr_evcnt(void *, pci_intr_handle_t);
65 void *iq80321_pci_intr_establish(void *, pci_intr_handle_t,
66 int, int (*func)(void *), void *, const char *);
67 void iq80321_pci_intr_disestablish(void *, void *);
68
69 void
iq80321_pci_init(pci_chipset_tag_t pc,void * cookie)70 iq80321_pci_init(pci_chipset_tag_t pc, void *cookie)
71 {
72
73 pc->pc_intr_v = cookie; /* the i80321 softc */
74 pc->pc_intr_map = iq80321_pci_intr_map;
75 pc->pc_intr_string = iq80321_pci_intr_string;
76 pc->pc_intr_evcnt = iq80321_pci_intr_evcnt;
77 pc->pc_intr_establish = iq80321_pci_intr_establish;
78 pc->pc_intr_disestablish = iq80321_pci_intr_disestablish;
79 }
80
81 int
iq80321_pci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)82 iq80321_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
83 {
84 struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
85 int b, d, f;
86 uint32_t busno;
87
88 /*
89 * The IQ80321's interrupts are routed like so:
90 *
91 * XINT0 i82544 Gig-E
92 *
93 * XINT1 UART
94 *
95 * XINT2 INTA# from S-PCI-X slot
96 *
97 * XINT3 INTB# from S-PCI-X slot
98 */
99
100 busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
101 busno = PCIXSR_BUSNO(busno);
102 if (busno == 0xff)
103 busno = 0;
104
105 pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
106
107 /* No mappings for devices not on our bus. */
108 if (b != busno)
109 goto no_mapping;
110
111 switch (d) {
112 case 0: /* i82546 Dual Gig-E */
113 if (pa->pa_intrpin == 1) {
114 *ihp = ICU_INT_XINT(0);
115 return (0);
116 }
117 if (pa->pa_intrpin == 2) {
118 *ihp = ICU_INT_XINT(1);
119 return (0);
120 }
121 goto no_mapping;
122
123 case 1: /* i31244 SATA */
124 if (pa->pa_intrpin == 1) {
125 *ihp = ICU_INT_XINT(2);
126 return (0);
127 }
128 goto no_mapping;
129
130 case 2: /* LSI Fibre */
131 if (pa->pa_intrpin == 1) {
132 *ihp = ICU_INT_XINT(3);
133 return (0);
134 }
135 goto no_mapping;
136
137 default:
138 no_mapping:
139 printf("iq80321_pci_intr_map: no mapping for %d/%d/%d\n",
140 pa->pa_bus, pa->pa_device, pa->pa_function);
141 return (1);
142 }
143
144 return (0);
145 }
146
147 const char *
iq80321_pci_intr_string(void * v,pci_intr_handle_t ih,char * buf,size_t len)148 iq80321_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
149 {
150
151 strlcpy(buf, i80321_irqnames[ih], len);
152 return buf;
153 }
154
155 const struct evcnt *
iq80321_pci_intr_evcnt(void * v,pci_intr_handle_t ih)156 iq80321_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
157 {
158
159 /* XXX For now. */
160 return (NULL);
161 }
162
163 void *
iq80321_pci_intr_establish(void * v,pci_intr_handle_t ih,int ipl,int (* func)(void *),void * arg,const char * xname)164 iq80321_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
165 int (*func)(void *), void *arg, const char *xname)
166 {
167
168 return (i80321_intr_establish(ih, ipl, func, arg));
169 }
170
171 void
iq80321_pci_intr_disestablish(void * v,void * cookie)172 iq80321_pci_intr_disestablish(void *v, void *cookie)
173 {
174
175 i80321_intr_disestablish(cookie);
176 }
177