1/* $NetBSD: imx31lk_start.S,v 1.7 2020/11/28 14:29:31 skrll Exp $ */ 2/*- 3 * Copyright (c) 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas of 3am Software Foundry. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include <machine/asm.h> 32#include <arm/armreg.h> 33#include "assym.h" 34 35RCSID("$NetBSD: imx31lk_start.S,v 1.7 2020/11/28 14:29:31 skrll Exp $") 36 37#ifndef SDRAM_START 38#define SDRAM_START 0x80000000 39#endif 40 41/* 42 * L1 == "Level One" == "first-level" 43 * L2 == "Level Two" == "second-level" 44 */ 45 46 .text 47 48 .global _C_LABEL(imx31lk_start) 49 50ENTRY_NP(imx31lk_start) 51 cpsid if, #PSR_SVC32_MODE 52 53 /* 54 * Firmware already mapped SDRAM VA == PA. at 0x800.. 55 * now map SDRAM also at VA 0x800... 56 */ 57 mrc p15, 0, r0, c2, c0, 0 /* L1 table addr into r0 */ 58#ifdef ARM_MMU_EXTENDED 59 mcr p15, 0, r0, c2, c0, 1 /* copy it to TTBR1 */ 60 mov r3, #TTBCR_S_N_1 61 mcr p15, 0, r3, c2, c0, 2 /* set TTBCR to enable TTBR1 */ 62#endif 63 64 ldr r1, =KERNEL_BASE 65 lsr r1, r1, L1_S_SHIFT 66 add r2, r1, #0x80 /* 128 1MB entries */ 67 ldr r3, .Lsdram_pde 681: 69 /* and looplooploop */ 70 str r3, [r0, r1, lsl #2] 71 add r3, r3, #L1_S_SIZE 72 add r1, r1, #1 73 cmp r1, r2 74 blt 1b 75 76 /* 77 * Map an L1 section for each device to make this easy. 78 */ 79 /* UART1 */ 80 mov r1, #0xfd0 /* offset to 0xfd000000 */ 81 82 ldr r3, .Lio_pde 83 str r3, [r0, r1, lsl #2] 84 85 /* etc, TBD... */ 86 87 /* 88 * Make domain control go full art. 89 */ 90 mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2))|DOMAIN_CLIENT) 91 mcr p15, 0, r0, c3, c0, 0 92 93 /* 94 * Now let's clean the cache again to make sure everything is in place. 95 */ 96 bl _C_LABEL(arm11x6_idcache_wbinv_all) 97 98 /* Invalidate TLBs just to be sure */ 99 mov r0, #0 100 mcr p15, 0, r0, c8, c7, 0 101 102 /* 103 * You are standing at the gate to NetBSD. --More-- 104 * Unspeakable cruelty and harm lurk down there. --More-- 105 * Are you sure you want to enter? 106 */ 107#ifdef KERNEL_BASES_EQUAL 108 b start 109#else 110 adr r0, .Lstart 111 ldr ip, [r0] 112 bx ip 113#endif 114 115/* symbol to use for address calculation in the right VA */ 116#ifndef KERNEL_BASES_EQUAL 117.Lstart: 118 .word start 119#endif 120 121#if L1_S_DOM_KERNEL 122#error kernel domain (L1_S_DOM_KERNEL) is not 0 123#endif 124 125.Lsdram_pde: 126 .word 0x80000000|L1_S_AP_KRW|L1_S_C|L1_S_B|L1_TYPE_S 127.Lio_pde: 128 .word 0x43f00000|L1_S_AP_KRW|L1_TYPE_S 129END(imx31lk_start) 130